EEWORLDEEWORLDEEWORLD

Part Number

Search

TC55NEM208ATGN55

Description
IC 512K X 8 STANDARD SRAM, 55 ns, PDSO32, 0.400 INCH, 1.27 MM PITCH, LEAD FREE, PLASTIC, TSOP2-32, Static RAM
Categorystorage    storage   
File Size213KB,11 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric View All

TC55NEM208ATGN55 Overview

IC 512K X 8 STANDARD SRAM, 55 ns, PDSO32, 0.400 INCH, 1.27 MM PITCH, LEAD FREE, PLASTIC, TSOP2-32, Static RAM

TC55NEM208ATGN55 Parametric

Parameter NameAttribute value
MakerToshiba Semiconductor
Parts packaging codeTSOP2
package instructionTSOP2, TSOP32,.46
Contacts32
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time55 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G32
length20.95 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP32,.46
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.000002 A
Minimum standby current2 V
Maximum slew rate0.035 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width10.16 mm

TC55NEM208ATGN55 Preview

TC55NEM208AFGV/ATGV55,70
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 8-BIT STATIC RAM
DESCRIPTION
Lead-Free
The TC55NEM208AFGV/ATGV is a 4,194,304-bit static random access memory (SRAM) organized as 524,288
words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a
single 2.7 to 5.5 V power supply. Advanced circuit technology provides both high speed and low power at an
operating current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power
mode at 1.8
µA
standby current (typ) when chip enable (
CE
) is asserted high. There are two control inputs.
CE
is
used to select the device and for data retention control, and output enable (
OE
) provides fast memory access. This
device is well suited to various microprocessor system applications where high speed, low power and battery
backup are required. And, with a guaranteed operating range of
−40°
to 85°C, the TC55NEM208AFGV/ATGV can
be used in environments exhibiting extreme temperature conditions. The TC55NEM208AFGV/ATGV is available in
a standard plastic 32-pin small-outline package (SOP) and plastic 32-pin thin-small-outline package (TSOP).
FEATURES
Low-power dissipation
Operating: 15 mW/MHz (typical)
Single power supply voltage of 2.7 to 5.5 V
Power down features using
CE
.
Data retention supply voltage of 2.0 to 5.5 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
−40°
to 85°C
Standby Current (maximum):20
µA
Access Times (maximum):
5 V
±
10%
55
Access Time
CE Access Time
OE Access Time
55 ns
55 ns
30 ns
70
70 ns
70 ns
35 ns
2.7 V~5.5 V
55
70
85 ns 100 ns
85 ns 100 ns
60 ns
70 ns
Package:
SOP32-P-525-1.27 (AFGV)
(Weight:1.12 g typ)
TSOP II32-P-400-1.27 (ATGV) (Weight:0.52 g typ)
Lead-Free
PIN ASSIGNMENT
(TOP VIEW)
32 PIN SOP &
TSOP
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
A15
A17
R/W
A13
A8
A9
A11
OE
A10
CE
I/O8
I/O7
I/O6
I/O5
I/O4
PIN NAMES
A0~A18
R/W
Address Inputs
Read/Write Control
OE
CE
I/O1~I/O8
V
DD
GND
Output Enable
Chip Enable
Data Inputs/Outputs
Power
Ground
(AFGV/ATGV)
2004-10-14
1/11
TC55NEM208AFGV/ATGV55,70
BLOCK DIAGRAM
CE
A4
A5
A6
A7
A8
A9
A11
A14
A15
A16
A18
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
V
DD
GND
MEMORY CELL ARRAY
2,048
×
256
×
8
(4,194,304)
ROW ADDRESS
BUFFER
ROW ADDRESS
REGISTER
ROW ADDRESS
DECODER
8
DATA
CONTROL
SENSE AMP
COLUMN ADDRESS
DECODER
CLOCK
GENERATOR
COLUMN ADDERSS
REGISTER
COLUMN ADDRESS
BUFFER
A0 A1 A2 A3 A10A12A13 A17
CE
OE
R/W
CE
CE
OPERATING MODE
MODE
Read
Write
Output Deselect
Standby
*
= don't care
H = logic high
L = logic low
CE
L
L
L
H
OE
L
*
R/W
H
L
H
*
I/O1~I/O8
Output
Input
High-Z
High-Z
POWER
I
DDO
I
DDO
I
DDO
I
DDS
H
*
MAXIMUM RATINGS
SYMBOL
V
DD
V
IN
V
I/O
P
D
T
solder
T
stg
T
opr
Power Supply Voltage
Input Voltage
Input/Output Voltage
Power Dissipation
Soldering Temperature (10s)
Storage Temperature
Operating Temperature
RATING
VALUE
0.3~7.0
0.3
*
~7.0
0.5~V
DD
+
0.5
UNIT
V
V
V
W
°C
°C
°C
0.6
260
55~150
40~85
*
:
2.0 V when measured at a pulse width of 20ns
2004-10-14
2/11
TC55NEM208AFGV/ATGV55,70
DC RECOMMENDED OPERATING CONDITIONS
(Ta
= −40°
to 85°C)
SYMBOL
V
DD
V
IH
V
IL
V
DH
PARAMETER
Power Supply Voltage
Input High Voltage
Input Low Voltage
Data Retention Supply Voltage
5 V
±
10%
MIN
4.5
2.4
0.3
*
2.7 V~5.5 V
MAX
5.5
MIN
2.7
0.3
*
TYP
5.0
TYP
5.0
MAX
5.5
V
DD
+
0.3
0.2
5.5
UNIT
V
V
V
V
V
DD
+
0.3 V
DD
0.2
0.6
5.5
2.0
2.0
*:
2.0V when measured at a pulse width of 20 ns
DC CHARACTERISTICS
(Ta
= −40°
to 85°C, V
DD
=
5 V
±
10%)
SYMBOL
I
IL
I
OH
I
OL
I
LO
l
DDO1
Operating Current
l
DDO2
I
DDS1
I
DDS2
Standby Current
PARAMETER
Input Leakage
Current
Output High Current
Output Low Current
Output Leakage
Current
V
IN
=
0 V~V
DD
V
OH
=
2.4 V
V
OL
=
0.4 V
CE
=
V
IH
or R/W
=
V
IL
or OE
=
V
IH
, V
OUT
=
0 V~V
DD
CE
=
V
IL
and R/W
=
V
IH
,
I
OUT
=
0 mA,
Other Input
=
V
IH
/V
IL
CE
=
0.2 V and R/W
=
V
DD
0.2 V,
I
OUT
=
0 mA,
Other Input
=
V
DD
0.2 V/0.2 V
CE
=
V
IH
CE
=
V
DD
0.2 V,
V
DD
=
2.0 V~5.5 V
Ta
=
25°C
Ta
= −
40~40°C
Ta
= −
40~85°C
MIN
1
µ
s
t
cycle
MIN
1
µ
s
TEST CONDITION
MIN
1.0
TYP
MAX
±
1.0
±
1.0
UNIT
µ
A
mA
mA
µ
A
2.1
35
mA
8
30
mA
3
3
mA
µ
A
1.8
3
20
DC CHARACTERISTICS
(Ta
= −40°
to 85°C, V
DD
=
3 V
±
10%)
SYMBOL
I
IL
I
OH
I
OL
I
LO
I
DDO2
PARAMETER
Input Leakage
Current
Output High Current
Output Low Current
Output Leakage
Current
Operating Current
V
IN
=
0 V~V
DD
V
OH
=
V
DD
0.2 V
V
OL
=
0.2 V
CE
=
V
IH
or R/W
=
V
IL
or OE
=
V
IH
, V
OUT
=
0 V~V
DD
CE
=
0.2 V and R/W
=
V
DD
0.2 V,
I
OUT
=
0 mA,
Other Input
=
V
DD
0.2 V/0.2 V
CE
=
V
DD
0.2 V
MIN
t
cycle
1
µ
s
TEST CONDITION
MIN
0.1
TYP
MAX
±
1.0
±
1.0
UNIT
µ
A
mA
mA
µ
A
0.1
30
mA
3
1.6
Ta
=
25°C
I
DDS2
Standby Current
Ta
= −
40~40°C
Ta
= −
40~85°C
3
20
µ
A
CAPACITANCE
(Ta
=
25°C, f
=
1 MHz)
SYMBOL
C
IN
C
OUT
Note:
PARAMETER
Input Capacitance
Output Capacitance
V
IN
=
GND
V
OUT
=
GND
TEST CONDITION
MAX
10
10
UNIT
pF
pF
This parameter is periodically sampled and is not 100% tested.
2004-10-14
3/11
TC55NEM208AFGV/ATGV55,70
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
= −40°
to 85°C, V
DD
=
5 V
±
10%)
READ CYCLE
TC55NEM208AFGV/ATGV
SYMBOL
PARAMETER
MIN
t
RC
t
ACC
t
CO
t
OE
t
COE
t
OEE
t
OD
t
ODO
t
OH
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Output Data Hold Time
55
55
MAX
70
MIN
70
UNIT
MAX
55
55
30
70
70
35
5
0
5
0
ns
25
25
30
30
10
10
WRITE CYCLE
TC55NEM208AFGV/ATGV
SYMBOL
PARAMETER
MIN
t
WC
t
WP
t
CW
t
AS
t
WR
t
ODW
t
OEW
t
DS
t
DH
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Address Setup Time
Write Recovery Time
R/W Low to Output High-Z
R/W High to Output Active
Data Setup Time
Data Hold Time
55
40
45
0
0
55
MAX
70
MIN
70
50
55
0
0
UNIT
MAX
ns
25
30
0
25
0
0
30
0
AC TEST CONDITIONS
PARAMETER
Input pulse level
t
R
, t
F
Timing measurements
Reference level
Output load
TEST CONDITION
0.4 V, 2.6 V
5 ns
1.5 V
1.5 V
30 pF
+
1 TTL Gate (55)
100 pF
+
1 TTL Gate (70)
2004-10-14
4/11
TC55NEM208AFGV/ATGV55,70
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
= −40°
to 85°C, V
DD
=2.7
to 5.5 V)
READ CYCLE
TC55NEM208AFGV/ATGV
SYMBOL
PARAMETER
MIN
t
RC
t
ACC
t
CO
t
OE
t
COE
t
OEE
t
OD
t
ODO
t
OH
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Output Data Hold Time
85
55
MAX
70
MIN
100
UNIT
MAX
85
85
60
100
100
70
5
0
5
0
ns
35
35
40
40
10
10
WRITE CYCLE
TC55NEM208AFGV/ATGV
SYMBOL
PARAMETER
MIN
t
WC
t
WP
t
CW
t
AS
t
WR
t
ODW
t
OEW
t
DS
t
DH
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Address Setup Time
Write Recovery Time
R/W Low to Output High-Z
R/W High to Output Active
Data Setup Time
Data Hold Time
85
55
60
0
0
55
MAX
70
MIN
100
60
70
0
0
UNIT
MAX
ns
35
40
0
35
0
0
40
0
AC TEST CONDITIONS
PARAMETER
Input pulse level
t
R
, t
F
Timing measurements
Reference level
Output load
TEST CONDITION
0.2 V, V
DD
0.2 V
5 ns
1.5 V
1.5 V
30 pF (Include Jig) (55)
100 pF (Include Jig) (70)
2004-10-14
5/11

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1939  446  2867  921  1962  40  9  58  19  37 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号