UNISONIC TECHNOLOGIES CO., LTD
19N10
100V N-Channel MOSFET
DESCRIPTION
The UTC 100V N-Channel enhancement mode power field
effect transistors (MOSFET) are produced by UTC’s planar stripe,
DMOS technology which has been tailored especially in the
avalanche and commutation mode to minimize on-state resistance,
provide superior switching performance, and withstand high energy
pulse. They are suited for low voltage applications such as audio
amplifier, high efficiency switching DC/DC converters, and DC motor
control.
Power MOSFET
FEATURES
* R
DS(ON)
= 0.1Ω
@V
GS
= 10 V
* Ultra low gate charge ( typical 19nC )
* Low reverse transfer Capacitance ( C
RSS
= typical 32pF )
* Fast switching capability
* Avalanche energy Specified
* Improved dv/dt capability, high ruggedness
SYMBOL
2.Drain
1.Gate
3.Source
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
19N10L-T3P-T
19N10G-T3P-T
19N10L-TA3-T
19N10G-TA3-T
19N10L-TM3-T
19N10G-TM3-T
19N10L-TN3-R
19N10G-TN3-R
19N10L-TQ2-R
19N10G-TQ2-R
19N10L-TQ2-T
19N10G-TQ2-T
Package
TO-3P
TO-220
TO-251
TO-252
TO-263
TO-263
Pin Assignment
1
2
3
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
Packing
Tube
Tube
Tube
Tape Reel
Tape Reel
Tube
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QW-R502-261.D
19N10
ABSOLUTE MAXIMUM RATINGS
(T
C
=25°C, unless otherwise specified)
Power MOSFET
PARAMETER
SYMBOL
RATINGS
UNIT
Drain-Source Voltage
V
DSS
100
V
Gate-Source Voltage
V
GSS
± 25
V
Continuous Drain Current
I
D
15.6
A
Pulsed Drain Current (Note 2)
I
DM
62.4
A
Avalanche Current (Note 2)
I
AR
15.6
A
Single Pulsed Avalanche Energy (Note 3)
E
AS
220
mJ
Repetitive Avalanche Energy (Note 2)
E
AR
5.0
mJ
Peak Diode Recovery dv/dt (Note 4)
dv/dt
6.0
V/ns
50
W
TO-251/TO-252
Power Dissipation
P
D
62.5
W
TO-220/TO-263
178
W
TO-3P
Junction Temperature
T
J
+150
°C
Storage Temperature
T
STG
-55 ~ +150
°C
Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Pulse width limited by T
J(MAX)
3. L=1.35mH, I
AS
=15.6A, V
DD
=25V, R
G
=25
Ω,
Starting T
J
=25°C
4. I
SD
≤19A,
di/dt
≤
300A/µs, V
DD
≤BV
DSS
, Starting T
J
=25°C
THERMAL DATA
PARAMETER
TO-251/TO-252
Junction to Ambient
TO-220/TO-263
TO-3P
TO-251/TO-252
Junction to Case
TO-220/TO-263
TO-3P
SYMBOL
θ
JA
RATINGS
50
62.5
40
2.5
2.0
0.7
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ
JC
ELECTRICAL CHARACTERISTICS
(T
J
=25°C, unless otherwise specified)
PARAMETER
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Drain-Source Leakage Current
Forward
Gate-Source Leakage Current
Reverse
ON CHARACTERISTICS
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
DYNAMIC PARAMETERS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SYMBOL
BV
DSS
TEST CONDITIONS
MIN
100
0.1
1
100
-100
2.0
0.078
4.0
0.1
11
780
215
40
TYP
MAX UNIT
V
V/°C
µA
nA
V
Ω
S
pF
pF
pF
V
GS
=0V, I
D
=250µA
I =250µA,
∆BV
DSS
/∆T
J D
Referenced to 25°C
V
DS
=100V, V
GS
=0V
I
DSS
V
GS
=25V, V
DS
=0V
I
GSS
V
GS
=-25V, V
DS
=0V
V
GS(TH)
R
DS(ON)
g
FS
C
ISS
C
OSS
C
RSS
V
DS
=V
GS
, I
D
=250µA
V
GS
=10V, I
D
=7.8A
V
DS
=40V, I
D
=7.8A (Note 1)
V
DS
=25V, V
GS
=0V, f=1.0MHz
600
165
32
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QW-R502-261.D
19N10
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
SWITCHING PARAMETERS
Total Gate Charge
Q
G
V
DS
=80V, I
D
=19A, V
GS
=10V
Gate Source Charge
Q
GS
(Note 1, 2)
Gate Drain Charge
Q
GD
Turn-ON Delay Time
t
D(ON)
Turn-ON Rise Time
t
R
V
DD
=50V, I
D
=19A, R
G
=25Ω
(Note 1, 2)
Turn-OFF Delay Time
t
D(OFF)
Turn-OFF Fall-Time
t
F
SOURCE- DRAIN DIODE RATINGS AND CHARACTERISTICS
Diode Forward Voltage
V
SD
V
GS
=0V, I
S
=15.6A
Maximum Body-Diode Continuous Current
I
S
Maximum Pulsed Drain-Source Diode
I
SM
Forward Current
Body Diode Reverse Recovery Time
t
RR
V
GS
= 0V, I
S
=19A,
dI
F
/dt=100A/μs (Note 1)
Body Diode Reverse Recovery Charge
Q
RR
Note: 1. Pulse Test : Pulse width
≤300µs,
Duty cycle≤ 2%
Note:
2. Essentially independent of operating temperature
MIN
Power MOSFET
TYP
19
3.9
9.0
7.5
150
20
65
MAX UNIT
25
nC
25
310
50
140
1.5
15.6
62.4
ns
ns
ns
ns
V
A
A
ns
nC
78
200
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19N10
TEST CIRCUITS AND WAVEFORMS
+
V
DS
-
+
-
L
Power MOSFET
D.U.T.
R
G
Driver
V
GS
Same Type
as D.U.T.
* dv/dt controlled by R
G
* I
SD
controlled by pulse period
* D.U.T.-Device Under Test
V
DD
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
V
GS
(Driver)
Period
P.W.
D=
P. W.
Period
V
GS
= 10V
I
FM
, Body Diode Forward Current
I
SD
(D.U.T.)
I
RM
Body Diode Reverse Current
di/dt
Body Diode Recovery dv/dt
V
DS
(D.U.T.)
V
DD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
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QW-R502-261.D
19N10
TEST CIRCUITS AND WAVEFORMS (Cont.)
R
L
V
DD
Power MOSFET
V
DS
V
GS
R
G
V
DS
90%
10V
Pulse Width≤ 1μs
Duty Factor≤0.1%
D.U.T.
V
GS
10%
t
D(ON)
t
R
t
D(OFF)
t
F
Fig. 2A Switching Test Circuit
Fig. 2B Switching Waveforms
10V
Q
GS
Q
G
Q
GD
V
GS
Charge
Fig. 3A Gate Charge Test Circuit
Fig. 3B Gate Charge Waveform
V
DS
L
BV
DSS
I
AS
R
D
V
DD
D.U.T.
V
DD
I
D(t)
V
DS(t)
10V
t
p
t
p
Time
Fig. 4A Unclamped Inductive Switching Test Circuit
Fig. 4B Unclamped Inductive Switching Waveforms
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