ICS331-26
Single Output Clock Synthesizer
Description
The ICS331-26 is a low cost frequency generator that
is factory programmable. Using analog/digital
Phase-Locked-Loop (PLL) techniques, the device
accepts a 24 MHz clock input to produce selectable
output clocks of 48 MHz and 72 MHz.
The device also has a power down feature that
tri-states the clock outputs and turns off the PLLs when
the PDTS pin is taken low.
Features
•
•
•
•
•
•
•
8-pin SOIC package – Pb-free, RoHS compliant
Input clock frequency of 24 MHz
Selectable output clocks of 48 MHz or 72 MHz
Spread spectrum
Duty cycle of 45/55
Operating voltage of 3.3 V
Advanced, low power CMOS process
Block Diagram
VDD
S1:0
2
OTP
ROM with
PLL
Divider
Values
24 MHz Crystal
or Clock
X1
Crystal
Oscillator
X2
PLL Clock
Synthesis
and Control
Circuitry
CLK
Optional crystal capacitors
GND
PDTS (both outputs and PLL)
MDS 331-26 E
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Integrated Device Technology, Inc.
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Revision 051310
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ICS331-26
Single Output Clock Synthesizer
Pin Assignment
X1/ICLK
VDD
GND
S0
1
2
3
4
8
7
6
5
X2
PDTS
S1
CLK
Output Clock Selection Table
Spread
Percentage
±1.5%
±1.5%
±1.0%
±1.0%
S1
0
0
1
1
S0
0
1
0
0
CLK (MHz)
48
72
48
72
8 pin (150 mil) SOIC
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
X1
VDD
GND
S0
CLK
S1
PDTS
X2
Pin
Type
XI
Power
Power
Input
Output
Input
Input
XO
Connect to +3.3 V.
Connect to ground.
Pin Description
Connect this pin to a 24 MHz crystal or clock input.
Select pin 0 for frequency selection on CLK. Internal pull-up.
Clock output per table above. Weak internal pull-down when tri-stated.
Select pin 1 for frequency selection on CLK. Internal pull-up.
Powers down entire chip. Tri-states CLK outputs when low. Internal pull-up.
Float for clock input.
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50Ω trace (a
commonly used trace impedance), place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω
.
A decoupling capacitor of 0.01µF must be connected
between VDD and the PCB ground plane.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS331-26 must be isolated from system power supply
noise to perform optimally.
MDS 331-26 E
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I n t e gra te d D ev i ce Technology, Inc.
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Revision 051310
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ICS331-26
Single Output Clock Synthesizer
must be connected from each of the pins X1 and X2 to
ground.
The value (in pF) of these crystal caps should equal
(C
L
-6 pF)*2. In this equation, C
L
= crystal load
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 20
pF [(16-6) x 2 = 20].
the PCB trace to the ground via. Distance of the ferrite
bead and bulk decoupling from the device is less
critical.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI the 33Ω series termination resistor,
if needed, should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the ICS331-26. This includes signal traces
just underneath the device, or on layers adjacent to the
ground plane layer used by the device.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS331-26. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
125° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.15
Typ.
+3.3
Max.
+70
+3.45
Units
°
C
V
MDS 331-26 E
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I n t e gra te d D ev i ce Technology, Inc.
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ICS331-26
Single Output Clock Synthesizer
DC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C
Parameter
Operating Voltage
Supply Current
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage (CMOS
High)
Output High Voltage
Output Low Voltage
Short Circuit Current
Nominal Output Impedance
Internal Pull-up Resistor
Internal Pull-down Resistor
Symbol
VDD
IDD
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OH
V
OL
I
OS
Z
O
R
PU
R
PD
Conditions
No load, PDTS=1
No load, PDTS=0
PDTS pin
PDTS pin
SEL pin
SEL pin
ICLK pin
ICLK pin
I
OH
= -8 mA
I
OH
= -12 mA
I
OL
= 12 mA
Min.
3.15
Typ.
3.3
18
400
Max.
3.45
Units
V
mA
µA
V
VDD-0.5
0.4
2
V
V
V
V
V
V
V
0.4
VDD/2+1
VDD/2-1
VDD-0.4
2.4
0.4
±70
20
V
mA
Ω
kΩ
kΩ
S0, S1, PDTS pins
CLK output
360
510
AC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C
Parameter
Output Rise Time
Output Fall Time
Duty Cycle
Cycle Jitter (short term jitter)
Input Frequency
Output Enable Time
Output Disable Time
Symbol
t
OR
t
OF
t
ja
Conditions
0.8 to 2.0V, Note 1
2.0 to 0.8V, Note 1
at VDD/2, Note 1
cycle to cycle
PDTS high to spread
profile stable
PDTS low to tri-state
Min.
Typ.
1.0
1.0
Max. Units
ns
ns
60
%
ps
MHz
ms
ns
40
150
24
3
20
MDS 331-26 E
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I n t e gra te d D ev i ce Technology, Inc.
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Revision 051310
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ICS331-26
Single Output Clock Synthesizer
Package Outline and Package Dimensions
(8 pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Symbol
Min
Max
Inches
Min
Max
8
E
INDEX
AREA
H
1 2
D
A
A1
B
C
D
E
e
H
h
L
α
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0
°
8
°
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0
°
8
°
A
A1
h x 45
C
-C-
e
B
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
331M-26LF
331M-26LFT
Marking
331M26LF
Shipping Packaging
Tubes
Tape and Reel
Package
8-pin SOIC
8-pin SOIC
Temperature
0 to +70° C
0 to +70° C
"LF" suffix to the part number denotes Pb-Free configuration, RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any
circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or
critical medical instruments.
MDS 331-26 E
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I n t e gra te d D ev i ce Technology, Inc.
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Revision 051310
w w w. i d t . c o m
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