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309RT

Description
Clock Generator, 200MHz, PDSO20, 0.150 INCH, SSOP-20
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size188KB,9 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

309RT Overview

Clock Generator, 200MHz, PDSO20, 0.150 INCH, SSOP-20

309RT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionSSOP, SSOP20,.25
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length8.65 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency200 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
power supply3.3 V
Master clock/crystal nominal frequency50 MHz
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
width3.9 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
DATASHEET
SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH
Description
The ICS309 is a versatile serially-programmable, triple
PLL with spread spectrum clock source. The ICS309
can generate any frequency from 250kHz to 200 MHz,
and up to 6 different output frequencies simultaneously.
The outputs can be reprogrammed on-the-fly, and will
lock to a new frequency in 10 ms or less.
To reduce system EMI emissions, spread spectrum is
available that supports modulation frequencies of
31 kHz and 120 kHz, as well as modulation amplitudes
of +/-0.25% to +/-2.0%. Both center and down-spread
options are available.
The device includes a PDTS pin which tri-states the
output clocks and powers down the entire chip.
The ICS309 default for non-programmed start-up are
buffered reference clock outputs on all clock output
pins.
IDT’s VersaClock programming software allows the
user to configure up to 9 outputs with target
frequencies, spread spectrum capabilities or buffered
reference clock outputs. The VersaClock
TM
software
automatically configures the PLLs for optimal overall
performance.
TM
ICS309
Features
Packaged in 20-pin SSOP (QSOP)
Available in Pb (lead) free package
Highly accurate frequency generation
M/N Multiplier PLL: M = 1..2048, N = 1..1024
Serially programmable: user determines the output
frequency via a 3-wire interface
Spread Spectrum frequency modulation for reduced
system EMI
Center or Down Spread up to 4% total
Selectable 32 kHz and 120 kHz modulation
Eliminates need for custom quartz oscillators
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 3 - 50 MHz
Output clock frequencies up to 200 MHz
Operating voltage of 3.3 V
Up to 9 reference clock outputs
Power down tri-state mode
Very low jitter
NOTE: EOL for non-green parts to occur on 5/13/10
per PDN U-09-01
Block Diagram
V DD
3
STROBE
SCLK
DATA
P LL1 w ith
S pread
S pectrum
CLK1
CLK2
Divide
Logic
and
Output
Enable
Control
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
P LL2
C rystal or
clock input
X 1/IC LK
C rystal
O scillator
X2
P LL3
CLK9
E xternal capacitors are
required w ith a crystal input.
GND
2
P D TS
IDT™ / ICS™
SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH 1
ICS309
REV J 090209

309RT Related Products

309RT 309RI 309R
Description Clock Generator, 200MHz, PDSO20, 0.150 INCH, SSOP-20 Clock Generator, 200MHz, PDSO20, 0.150 INCH, SSOP-20 Clock Generator, 200MHz, PDSO20, 0.150 INCH, SSOP-20
Is it Rohs certified? incompatible incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SSOP SSOP SSOP
package instruction SSOP, SSOP20,.25 SSOP, SSOP20,.25 0.150 INCH, SSOP-20
Contacts 20 20 20
Reach Compliance Code not_compliant not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0 e0
length 8.65 mm 8.65 mm 8.65 mm
Humidity sensitivity level 1 1 1
Number of terminals 20 20 20
Maximum operating temperature 70 °C 85 °C 70 °C
Maximum output clock frequency 200 MHz 200 MHz 200 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SSOP
Encapsulate equivalent code SSOP20,.25 SSOP20,.25 SSOP20,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
power supply 3.3 V 3.3 V 3.3 V
Master clock/crystal nominal frequency 50 MHz 50 MHz 50 MHz
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.75 mm 1.75 mm
Maximum supply voltage 3.6 V 3.6 V 3.6 V
Minimum supply voltage 3 V 3 V 3 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL INDUSTRIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 0.635 mm 0.635 mm
Terminal location DUAL DUAL DUAL
width 3.9 mm 3.9 mm 3.9 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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