341MIP-XXLFT datasheet, PDF - EEWORLD Datasheet

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341MIP-XXLFT: DescriptionClock Generator; CategoryThe embedded processor and controller Microcontrollers and processors; File Size93KB，9 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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341MIP-XXLFT Overview

Clock Generator

341MIP-XXLFT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
package instruction	SOP,
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G8
length	4.9 mm
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Master clock/crystal nominal frequency	50 MHz
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

Description

The ICS341 is a low cost, single-output, field programmable

clock synthesizer. The ICS341 can generate an output

frequency from 250 kHz to 200 MHz and may employ

Spread Spectrum techniques to reduce system

electro-magnetic interference (EMI).

Using IDT’s VersaClock

™

software to configure the PLL and

output, the ICS341 contains a One-Time Programmable

(OTP) ROM to allow field programmability. Programming

features include 4 selectable configuration registers.

The device employs Phase-Locked Loop (PLL) techniques

to run from a standard fundamental mode, inexpensive

crystal, or clock. It can replace multiple crystals and

oscillators, saving board space and cost.

The device also has a power-down feature that tri-states the

clock outputs and turns off the PLLs when the PDTS pin is

taken low.

The ICS341 is also available in factory programmed custom

versions for high-volume applications.

ICS341

Features

•

8-pin SOIC package (Pb-free)

•

Highly accurate frequency generation

•

M/N Multiplier PLL: M = 1...2048, N = 1...1024

•

Output clock frequencies up to 200 MHz

•

Four ROM locations for frequency and spread selection

•

Spread spectrum capability for lower system EMI

•

Center or Down Spread up to 4% total

•

Selectable 32 kHz or 120 kHz modulation

•

Input crystal frequency from 5 to 27 MHz

•

Input clock frequency from 2 to 50 MHz

•

Operating voltage of 3.3 V

•

Advanced, low-power CMOS process

•

For two output clocks, use the ICS342. For three output

clocks, see the ICS343. For more than three outputs, see

the ICS345 or ICS348.

Block Diagram

VDD

S1:0

OTP ROM

with PLL

Divider

Values

Crystal or

clock input

X1/ICLK

Crystal

Oscillator

External capacitors are

required with a crystal input.

PLL Clock Synthesis,

Spred Spectrum and

Control Circuitry

CLK

GND

PDTS (output and PLL)

IDT® / ICS™

FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

ICS341

REV N 072816

341MIP-XXLFT Related Products

	341MIP-XXLFT	341MP-XXLF	341MP-XXLFT	341MIP-XXLF
Description	Clock Generator	Clock Generator	Clock Generator	Clock Generator
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
package instruction	SOP,	SOP,	SOP,	SOP,
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Number of terminals	8	8	8	8
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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