FAN5365 — 1A / 0.8A, 6MHz Digitally Programmable Regulator
November 2010
FAN5365
1A / 0.8A, 6MHz Digitally Programmable Regulator
Features
High Efficiency (>88%) at 6MHz
800mA or 1A Output Current
Regulation Maintained with V
IN
from 2.3V to 5.5V
6-Bit V
OUT
Programmable from 0.75 to 1.975V
6MHz Fixed-Frequency Operation (PWM Mode)
Excellent Load and Line Transient Response
Small Size, 470nH Inductor Solution
±2% DC Voltage Accuracy in PWM Mode
25ns Minimum On-Time
High-Efficiency, Low-Ripple, Light-Load PFM
Smooth Transition between PWM and PFM
40μA Operating PFM Quiescent Current
I C™-Compatible Interface up to 3.4Mbps
Pin-Selectable or I C™ Programmable Output Voltage
9-Bump, 1.27 x 1.29mm, 0.4mm Pitch WLCSP Package
2
2
Description
The FAN5365 is a high-frequency, ultra-fast transient
response, synchronous step-down, DC-DC converter
optimized for low-power applications using small, low-cost
inductors and capacitors. The FAN5365 supports up to
800mA or 1A load current.
The FAN5365 is ideal for mobile phones and similar portable
applications powered by a single-cell Lithium-Ion battery.
2
With an output voltage range adjustable via I C™ interface
from 0.75V to 1.975V, it supports low-voltage DSPs and
processors, core power supplies, and memory modules in
smart phones, data cards, and hand-held computers.
The FAN5365 operates at 6MHz (nominal) fixed switching
frequency in PWM mode.
During light-load conditions, the regulator includes a PFM
mode to enhance light-load efficiency. The regulator
transitions smoothly between PWM and PFM modes with no
glitches on V
OUT
. In hardware shutdown, the current
consumption is reduced to less than 200nA.
The serial interface is compatible with fast / standard mode,
2
fast mode plus, and high-speed mode I C specifications,
allowing transfers up to 3.4Mbps. This interface is used for
dynamic voltage scaling with 12.5mV voltage steps, for
reprogramming the mode of operation (PFM or forced
PWM), or to disable/enable the output voltage.
The chip's advanced protection features include short-circuit
protection and current and temperature limits. During a
sustained over-current event, the IC shuts down and restarts
after a delay to reduce average power dissipation into a
fault.
During startup, the IC controls the output slew rate to
minimize input current and output overshoot at the end of
soft-start. The IC maintains a consistent soft-start ramp,
regardless of output load during startup.
The FAN5365 is available in a 1.27 x 1.29mm, 9-bump
WLCSP package.
Applications
3G, WiFi , WiMAX™, and WiBro Data Cards
Netbooks , Ultra-Mobile PCs
SmartReflex™-Compliant Power Supply
Split Supply DSPs and
μP
Solutions OMAP™, XSCALE™
Handset Graphic Processors (NVIDIA , ATI)
®
®
®
®
All trademarks are the property of their respective owners
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
www.fairchildsemi.com
FAN5365 — 1A / 0.8A, 6MHz Digitally Programmable Regulator
Ordering Information
Part Number
(1)
Option
00
02
03
06
Slave Address LSB
A2
A1
1
1
0
0
Output
Current
mA
800
800
1000
1000
V
OUT
Programming
Min.
0.7500
0.7500
0.7500
1.1875
Power-up
Defaults
VSEL0
1.05
0.95
1.00
1.80
Package
WLCSP-09
WLCSP-09
WLCSP-09
WLCSP-09
A0
0
0
0
0
Max.
1.4375
1.4375
(3)
(3
)
VSEL1
1.20
1.10
1.20
1.80
FAN5365UC00X
FAN5365UC02X
FAN5365UC03X
FAN5355UC06X
(2)
(2)
0
1
0
0
1.5375
1.9750
Notes:
1. The “X” designator on the part number indicates tape and reel packaging.
2. Preliminary; not full production release at this time. Contact a Fairchild representative for information.
3. V
OUT
is limited to the maximum voltage for all VSEL codes greater than the maximum V
OUT
listed.
Typical Application
VIN
Q1
VIN
C
IN
EN
VSEL
SDA
SCL
PGND
AGND
VOUT
SW
VOUT
L
C
OUT
MODULATOR
Q2
Figure 1. Typical Application
Table 1. Recommended External Components
Component
L (L
OUT
)
C
OUT
(5)
Description
470nH Nominal
0603 (1.6x0.8x0.8), 10μF X5R
0402 (1x0.5x0.25), 4.7μF X5R
Vendor
Murata, TDK, FDK
Various
Taiyo-Yuden
Parameter
L
(4)
Min.
390
2.2
1.6
Typ.
470
80
10.0
4.7
Max.
600
15.0
Units
nH
mΩ
μF
μF
DCR (Series R)
C
(6)
C
IN
Notes:
4. Minimum L incorporates tolerance, temperature, and partial saturation effects (L decreases when increasing current).
5. A capacitor similar to C
IN
can be used for C
OUT
. With 1.4V of bias, a 4.7μF 0402 capacitor minimum value is 2.5μF.
The regulator is stable, but transient response degraded due to large signal effects.
6. Minimum C is a function of initial tolerance, maximum temperature, and the effective capacitance being reduced due to
frequency, dielectric, and voltage bias effects. C
IN
is biased with a higher voltage which reduces its effective capacitance
by a larger amount.
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
www.fairchildsemi.com
2
FAN5365 — 1A / 0.8A, 6MHz Digitally Programmable Regulator
Pin Configuration
A1
A2
A3
A3
A2
A1
B1
B2
B3
B3
B2
B1
C1
C2
C3
C3
C2
C1
Bumps Facing Down
Figure 2. WLCSP-09, 0.4mm Pitch
Bumps Facing Up
Pin Definitions
Pin #
A1
A2
A3
B1
B2
B3
C1
C2
C3
Name
VSEL
VIN
SDA
SW
SCL
EN
VOUT
PGND
AGND
Description
Voltage Select.
When HIGH, V
OUT
is set by VSEL1. When LOW, V
OUT
is set by VSEL0. This behavior
2
can be overridden through I C register settings. This pin should not be left floating.
Input Voltage.
Connect to input power source. The connection from this pin to C
IN
should be as short as
possible.
SDA.
I C interface serial data. This pin should not be left floating.
Switching Node.
Connect to output inductor.
SCL.
I C interface serial clock. This pin should not be left floating.
Enable.
When this pin is HIGH, the circuit is enabled. When LOW, part enters shutdown mode and
input current is minimized. This pin should not be left floating.
Output Voltage Monitor.
Tie this pin to the output voltage at C
OUT
. This is a signal input pin to the
control circuit and does not carry DC current.
Power GND.
Power return for gate drive and power transistors. Connect to AGND on PCB. The
connection from this pin to the bottom of C
IN
should be as short as possible.
Analog GND.
This is the signal ground reference for the IC. All voltage levels are measured with
respect to this pin. AGND should be connected to PGND at a single point.
2
2
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
www.fairchildsemi.com
3
FAN5365 — 1A / 0.8A, 6MHz Digitally Programmable Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
Symbol
VIN, SW Pins
V
CC
V
OUT
Other Pins
ESD
T
J
T
STG
T
L
Parameter
Min.
–0.3
–0.3
–0.3
Max.
6.5
2.5
V
IN
+ 0.3
3
1
(7)
Units
V
Electrostatic Discharge Protection
Junction Temperature
Storage Temperature
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
–40
–65
KV
+150
+150
+260
°C
°C
°C
Lead Soldering Temperature, 10 Seconds
Note:
7. Lesser of 6.5V or V
CC
+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend
exceeding them or designing to absolute maximum ratings.
Symbol
V
IN
V
CCIO
T
A
T
J
Parameter
Supply Voltage
SDA and SCL Voltage Swing
Ambient Temperature
Junction Temperature
(8)
Min.
2.3
1.2
–40
–40
Max.
5.5
2.0
+85
+125
Units
V
V
°C
°C
Note:
2
8. The I C interface operates with t
HD;DAT
= 0 as long as the pull-up voltage for SDA and SCL is less than 2.5V. If voltage
2
swings greater than 2.5V are required (for example, if the I C bus is pulled up to V
IN
), the minimum t
HD;DAT
must be
2
increased to 80ns. Most I C masters change SDA near the midpoint between the falling and rising edges of SCL, which
provides ample t
HD;DAT
.
Dissipation Ratings
(9)
Package
Wafer-Level Chip-Scale Package (WLCSP)
R
θJA
(10
)
Power Rating
at T
A
≤
25°C
900mW
Derating Factor
> T
A
= 25ºC
9mW/ºC
110ºC/W
Notes:
9. Maximum power dissipation is a function of T
J(max)
,
θ
JA
, and T
A
. The maximum allowable power dissipation at any
allowable ambient temperature is P
D
= [T
J(max)
- T
A
] /
θ
JA
.
10. This thermal data is measured with a high-K board (four-layer board, according to the JESD51-7 JEDEC standard).
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
www.fairchildsemi.com
4
FAN5365 — 1A / 0.8A, 6MHz Digitally Programmable Regulator
Electrical Specifications
Unless otherwise noted, over the recommended operating range for V
IN
and T
A
, EN = VSEL = SCL = SDA = 1.8V, and register
VSEL0[6] bit = 1. Typical values are at V
IN
= 3.6V, T
A
= 25°C. Circuit and components according to Figure 1.
Symbol Parameter
Power Supplies
I
Q
Quiescent Current
Conditions
I
O
= 0mA, PFM Mode, 2.3V<=V
IN
<=4.5V
I
O
= 0mA, PFM Mode, 2.3V<=V
IN
<=5.5V
I
O
= 0mA, 6MHz PWM Mode
EN = GND
EN = V
IN
, EN_DCDC bit = 0,
SDA = SCL = 1.8V (Software Shutdown)
V
IN
Rising
V
IN
Falling
Min.
Typ.
40
40
6.3
0.1
N/A
Max.
55
65
1.0
N/A
2.25
Units
μA
mA
μA
V
V
mV
V
V
μA
mΩ
I
SD
Shutdown Supply Current
V
UVLO
Under-Voltage Lockout Threshold
1.95
V
UVHYST
Under-Voltage Lockout Hysteresis
ENABLE, VSEL, SDA, SCL
V
IH
HIGH-Level Input Voltage
V
IL
LOW-Level Input Voltage
I
IN
Input Bias Current
Power Switch and Protection
P-Channel MOSFET On
R
DS(ON)P
Resistance
I
LKGP
P-Channel Leakage Current
N-Channel MOSFET On
R
DS(ON)N
Resistance
I
LKGN
N-Channel Leakage Current
I
LIMPK
P-MOS Current Limit
2.18
2.02
160
1.05
Input Tied to GND or V
IN
V
IN
= 3.6V
V
DS
= 5.5V
V
IN
= 3.6V
V
DS
= 5.5V
Options 00, 02
Options 03, 06
1150
1300
0.01
300
0.2
200
0.3
1350
1550
150
20
6.0
1.0
1600
1840
1.0
0.4
1.00
μA
mΩ
μA
mA
°C
°C
T
LIMIT
Thermal Shutdown
T
HYST
Thermal Shutdown Hysteresis
Frequency Control
(11)
f
SW
Switching Frequency
Output Regulation
PWM Operation
I
OUT(DC)
= 0, Forced PWM, V
OUT
= VSEL1
Default Value
2.3V
≤
V
IN
≤
5.5V, V
OUT
from Minimum to
Maximum, I
OUT(DC)
= 0 to 1A, Forced PWM
2.3V
≤
V
IN
≤
5.5V, V
OUT
from Minimum to
Maximum, I
OUT(DC)
= 0 to 1A, Auto
PWM/PFM
I
OUT(DC)
= 0 to 1A, Forced PWM
2.3V
≤
V
IN
≤
5.5V, I
OUT(DC)
= 300mA,
Forced PWM
PWM Mode, V
OUT
= 1.2V
PFM Mode, I
OUT(DC)
= 10mA
5.4
–1.5
–2.0
–2.0
6.6
1.5
2.0
3.5
MHz
%
%
%
%/A
%/V
mV
P-P
mV
P-P
V
OUT
V
OUT
Accuracy
Δ
V
OUT
Δ
I
LOAD
Δ
V
OUT
Δ
V
IN
Load Regulation
Line Regulation
Output Ripple Voltage
–0.2
0
4
16
V
RIPPLE
Continued on the following page…
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
www.fairchildsemi.com
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