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AN-6920MR
Integrated Critical-Mode PFC / Quasi-Resonant
Current-Mode PWM Controller FAN6920
1. Introduction
This application note presents practical step-by-step design
considerations for a power supply system employing
Fairchild’s FAN6920 PFC / PWM combination controller,
an integrated Boundary Conduction Mode (BCM) Power
Factor Correction (PFC) controller and Quasi-Resonant
(QR) PWM controller. Figure 1 shows the typical
application circuit, where the BCM PFC converter is in the
front end and the dual-switch quasi-resonant flyback
converter is in the back end.
FAN6920 achieves high efficiency with relatively low cost
for 75~200W applications where BCM and QR operation
with a two-switch flyback provides best performance. A
BCM boost PFC converter can achieve better efficiency
with lower cost than continuous conduction mode (CCM)
boost PFC converter. These benefits result from the
elimination of the reverse-recovery losses of the boost diode
and zero-voltage switching (ZVS) or near ZVS (also called
valley switching) of boost switch. The dual-switch QR
flyback converter for the DC/DC conversion achieves
higher efficiency than the conventional flyback converter
with leakage inductor energy recycles.
The FAN7382, a monolithic high- and low-side gate-driver
IC, can drive MOSFETs that operate up to +600V.
Efficiency can be further improved by using synchronous
rectification in the secondary side instead of a conventional
rectifier diode.
Figure 1. Typical Application Circuit
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • March 10, 2011
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AN-6920
APPLICATION NOTE
2. Operation Principles of BCM
Boost PFC Converters
The most widely used operation modes for the boost
converter are continuous conduction mode (CCM) and
boundary conduction mode (BCM). These refer to the
current flowing through the energy storage inductor of the
boost converter, as depicted in Figure 2. As the names
indicate, the inductor current in CCM is continuous; while
in BCM, the new switching period is initiated when the
inductor current returns to zero, which is at the boundary of
continuous conduction and discontinuous conduction
operations. Even though the BCM operation has higher
RMS current in the inductor and switching devices, it allows
better switching condition for the MOSFET and the diode.
As shown in Figure 2, the diode reverse recovery is
eliminated and a fast silicon carbide (SiC) diode is not
needed. MOSFET is also turned on with zero current, which
reduces switching loss.
source. This behavior makes the boost converter in BCM
operation an ideal candidate for power factor correction.
A by-product of the BCM is that the boost converter runs
with variable switching frequency that depends primarily on
the selected output voltage, the instantaneous value of the
input voltage, the boost inductor value, and the output
power delivered to the load. The operating frequency
changes as the input current follows the sinusoidal input
voltage waveform, as shown in Figure 3. The lowest
frequency occurs at the peak of sinusoidal line voltage.
Figure 3. Operation Waveforms of BCM PFC
The voltage-second balance equation for the inductor is:
V
IN
(
t
)
⋅
t
ON
=
(
V
O
.
PFC
−
V
IN
(
t
))
⋅
t
OFF
where V
IN
(t) is the rectified line voltage.
(1)
The switching frequency of BCM boost PFC converter is
obtained as:
f
SW
=
t
ON
1
1
V
O
.
PFC
−
V
IN
(
t
)
=
⋅
+
t
OFF
t
ON
V
OUT
1
V
O
.
PFC
−
V
IN
,
PK
⋅
| sin(2
π
f
LINE
t
) |
=
⋅
t
ON
V
O
.
PFC
(2)
where V
IN,PK
is the amplitude of the line voltage and f
LINE
is
the line frequency.
Figure 2. CCM vs. BCM Control
The fundamental idea of BCM PFC is that the inductor
current starts from zero in each switching period, as shown
in Figure 3. When the power transistor of the boost
converter is turned on for a fixed time, the peak inductor
current is proportional to the input voltage. Since the current
waveform is triangular, the average value in each switching
period is also proportional to the input voltage. In the case
of a sinusoidal input voltage, the input current of the
converter follows the input voltage waveform with a very
high accuracy and draws a sinusoidal input current from the
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • March 10, 2011
Figure 4 shows how the MOSFET on time and switching
frequency change as output power decreases. When the load
decreases, as shown in the right side of Figure 4, the peak
inductor current diminishes with reduced MOSFET on time
and the switching frequency increases.
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AN-6920
APPLICATION NOTE
3. Operation Principle of Dual-
Switch Quasi-Resonant Flyback
Converter
Dual-switch QR flyback converter topology derived from a
conventional square wave high/low side pulse-width
modulated (PWM), dual-switch flyback converter have
leakage inductance recycling loop, so that primary-side
snubber can remove, and can recycle the energy of the
leakage inductance stored during switch’s turn-on period.
This is especially suitable for high-power (up to 200W) and
slim-type applications. Figure 6 and Figure 7 show the
simplified circuit diagram of a dual-switch quasi-resonant
flyback converter and its typical waveforms. The basic
operation principles are:
When primary power switches turn on, input voltage
(V
IN
) is applied across the primary-side inductor (L
m
).
MOSFET current (I
DS
) increases linearly from zero to
the peak value (I
pk
). During this time, the energy is
drawn from the input and stored in the inductor.
When the primary power switches turn off, leakage
inductance of the transformer produces a voltage spike
on the PWM switches and causes a drain voltage
increase to the V
IN
voltage. Clamped to this level, the
leakage inductance energy stored during PWM switches
turning on could be released by diode (D
1
, D
2
) and the
voltage on the primary-side winding is clamped to V
IN
.
Therefore, the energy stored in the inductor forces the
rectifier diode (D
3
) to turn on. During the diode ON
time (t
D
), the output voltage (V
o
) is applied across the
secondary-side inductor and the diode current (I
D
)
decreases linearly from the peak value to zero. At the
end of t
D
, all the energy stored in the inductor has been
delivered to the output. During this period, the output
voltage is reflected to the primary side as V
o
×
N
P
/N
S
.
The sum of input voltage (V
IN
) and reflected output
voltage (V
o
×
N
p
/N
s
) is imposed across the MOSFETs.
The voltage on the primary-side winding is clamped to
V
IN
. If the voltage of input is too low, the voltage of
secondary side could be lower than output voltage
target (V
IN
< N
P
/N
S
×V
O
), and the output voltage would
follow input voltage drop.
When the inductor current reaches zero, the drain-to-
source voltage (V
DS
) begins to resonate by the
resonance between the primary-side inductor (L
m
) and
the MOSFET output capacitor (C
oss1
, C
oss2
) with an
amplitude of V
o
×
N
p
/N
s
on the offset of V
IN
, as depicted
in Figure 7. Quasi-resonant switching is achieved by
turning on the MOSFET when V
DS
reaches its
minimum value. This reduces the MOSFET turn-on
switching loss caused by the capacitance loading
between the drain and source of the MOSFET.
Figure 4. Frequency Variation of BCM PFC
Since the design of line filter and inductor for a BCM PFC
converter with variable switching frequency should be at
minimum frequency condition, it is worthwhile to examine
how the minimum frequency of BCM PFC converter
changes with operating conditions.
Figure 5 shows the minimum switching frequency, which
occurs at the peak of line voltage, as a function of the RMS
line voltage for different output voltage settings. For
universal line application, the minimum switching
frequency occurs at high line (265V
AC
) as long as the output
voltage is lower than about 405V.
Figure 5. Minimum Switching Frequency vs. RMS Line
Voltage (L = 780 H, P
OUT
= 100W)
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • March 10, 2011
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3
AN-6920
APPLICATION NOTE
Figure 6. Schematic of Dual-Switch Flyback Converter
and low cost. The bootstrap circuit is useful in a high-
voltage gate driver and operates as follows. When the high-
side V
S
goes below the IC supply voltage V
DD
or is pulled
down to ground (the low-side switch is turned on and the
high-side switch is turned off), the bootstrap capacitor,
C
BOOT
, charges through the transformer primary-side, from
the V
DD
power supply, as shown in Figure 8. This is
provided by V
BS
when high-side V
S
is pulled to a higher
voltage by the high-side switch. The V
BS
supply floats and
the bootstrap diode reverses bias and blocks the rail voltage
(the low-side switch is turned off and high-side switch is
turned on) from the IC supply voltage, V
DD
. However, the
dual-switch flyback high-side and low-side MOSFET turn
on and off at the same time. Therefore, once the high-side
MOSFET turns on, high-side V
S
equals PFC V
O
, the V
DD
can’t charge the C
BOOT
, even though the high-side V
S
is
pulled down to ground at leakage energy recycle period, but
the period is too short to charge C
BOOT
.
Figure 8 shows the high-side gate-driver circuit with the
auxiliary power supply. If V
CBOOT
is less than the HV IC
under-voltage threshold, the high-side gate output (V
HO
)
maintains turned-off state, then the low-side MOSFET turns
on and charges the C
BOOT
for one cycle, high-side driver
restarts at the next PWM cycle. Finally, the voltage of
auxiliary power supply follows the output voltage rise and
continues to supply energy to the high-side circuit.
I
ds
(MOSFET Drain-to-Source Current)
I
pk
I
D
(Diode Current)
I
pk
N
p
/N
s
V
ds
V
o
/2 N
p
/N
s
V
IN
V
IN
/2
V
o
/2 N
p
/N
s
t
ON
t
S
t
D
Figure 7. Typical Waveforms of Dual-Switch QR
Flyback Converter
4. High-Side Gate-Drive Circuit
Figure 8 and Figure 9 show the high/low-side gate driver
circuit. The high-side gate drive IC achieves high-
performance, is simple and inexpensive, but has a limitation
for dual-switch flyback application.
One of the most widely used methods to supply power to
the high-side gate driver circuitry of the high-voltage gate-
drive IC is the bootstrap power supply. This bootstrap
power supply technique has the advantage of being simple
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • March 10, 2011
4
Figure 8. High-Side Driver Circuit and Start Waveform
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AN-6920
APPLICATION NOTE
Figure 9 shows the high-side driver circuit with standby
power supply. This circuit uses the independent power
supply for HV IC to keep the high-side driver operating.
This circuit is used for applications with standby power, like
the PC power.
The MOSFET conduction time with a given line voltage at a
nominal output power is given as:
t
ON
=
2
⋅
P
O
.
PFC
⋅
L
η
⋅
V
LINE
2
(4)
where:
η
is the overall efficiency;
L is the boost inductance; and
P
OUT
is the nominal output power.
Using Equation 4, the minimum switching frequency of
Equation 3 can be expressed as:
f
SW
,
MIN
=
η
⋅
V
LINE 2
2
⋅
P
OUT
V
O
.
PFC
−
2
V
LINE
⋅
L
V
O
.
PFC
⋅
(5)
Since the minimum frequency occurs at high line as long as
the PFC output voltage is lower than 405V (as observed in
Figure 5); once the output voltage and minimum switching
frequency are set, the inductor value is given as:
Figure 9. High-Side Driver Circuit with Standby
Power Supply
L
=
η
⋅
(
V
LINE
.
MAX
)
2
2
⋅
P
OUT
⋅
f
SW
,
MIN
⋅
V
O
.
PFC
−
2
V
LINE
.
MAX
V
O
.
PFC
(6)
5. Design Considerations
This design procedure uses the schematic in Figure 1 as a
reference. A 90W PFC application with universal input
range is selected as a design example. The design
specifications are:
-
-
-
-
-
-
-
Line Voltage Range: 90~264V
AC
(60Hz)
Output of DC/DC Converter: 19V/4.7A (90W)
PFC Output Voltage: 400V
Minimum PFC Switching Frequency: > 50kHz
Brownout Protection Line Voltage: 70V
AC
Output Over-Voltage Protection Trip Point: 22.5V
Overall Efficiency: 90%
(PFC Stage: 95%, DC/DC Stage: 95%)
where V
LINE,MAX
is the maximum line voltage.
As the minimum frequency decreases, the switching loss is
reduced, while the inductor size and line filter size increase.
Thus, the minimum switching frequency should be
determined by the trade-off between efficiency and the size
of magnetic components. The minimum switching
frequency must be above 20kHz to prevent audible noise.
Once the inductance value is decided, the maximum peak
inductor current at the nominal output power is obtained at
low-line condition as:
I
L
.
PK
=
2 2
⋅
P
OUT
η
⋅
V
LINE
,
MIN
(7)
where V
LINE,MIN
is the minimum line voltage.
Since the maximum on time is internally limited at 20 s, it
should be smaller than 20 s such as:
Part A. PFC Section
[STEP-A1] Boost Inductor Design
The boost inductor value is determined by the output power
and the minimum switching frequency. From Equation 2,
the minimum frequency with a given line voltage and
MOSFET on time is obtained as:
t
ON MAX
=
2
⋅
P
OUT
⋅
L
<
20
µ
s
η
⋅
V
LINE
.
MIN
2
(8)
The number of turns of boost inductor should be determined
considering the core saturation. The minimum number is
given as:
f
SW
,
MIN
=
1
t
ON
⋅
V
O
.
PFC
−
2
V
LINE
V
O
.
PFC
(3)
N
BOOST
≥
I
L
,
PK
⋅
L
A
e
⋅ ∆
B
(9)
where:
V
LINE
is RMS line voltage;
t
ON
is the MOSFET conduction time; and
V
O.PFC
is the PFC output voltage.
where is Ae is the cross-sectional area of core and
∆B
is the
maximum flux swing of the core in Tesla.
∆B
should be set below the saturation flux density.
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© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • March 10, 2011
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