P4C164LL-100P3C datasheet, PDF

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P4C164LL-100P3C: DescriptionStandard SRAM, 8KX8, 100ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28; Categorystorage storage; File Size735KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C164LL-100P3C Overview

Standard SRAM, 8KX8, 100ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28

P4C164LL-100P3C Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DIP
package instruction	DIP,
Contacts	28
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	100 ns
JESD-30 code	R-PDIP-T28
JESD-609 code	e0
length	34.8615 mm
memory density	65536 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	28
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8KX8
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	5.334 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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P4C164LL

VERY LOW POWER 8Kx8

STATIC CMOS RAM

FEATURES

Current (Commercial/Industrial)

— Operating: 55 mA

— CMOS Standby: 3 µA

Access Times

—80/100 (Commercial or Industrial)

—90/120 (Military)

Single 5 Volts ±10% Power Supply

Easy Memory Expansion Using

and

Inputs

Common Data I/O

Three-State Outputs

Fully TTL Compatible Inputs and Outputs

Advanced CMOS Technology

Automatic Power Down

Packages

—28-Pin 300 and 600 mil DIP

—28-Pin 330 mil SOP

DESCRIPTIOn

The P4C164LL is a 64K density low power CMOS static

RAM organized as 8Kx8. The CMOS memory requires

no clocks or refreshing, and has equal access and cycle

times. Inputs are fully TTL-compatible. The RAM operates

from a single 5V±10% tolerance power supply.

Access times of 80 and 100 ns are available for commercial

and industrial temperatures; access times of 90 and 100

ns are available for military temperature. CMOS is utilized

to reduce power consumption to a low level.

The P4C164LL device provides asynchronous operation

with matching access and cycle times.

Memory locations are specified on address pins A

to A

Reading is accomplished by device selection (CE

LOW,

HIGH ) and output enabling (OE) while write enable

(WE) remains HIGH. By presenting the address under

these conditions, the data in the addressed memory loca-

tion is presented on the data input/output pins. The input/

output pins stay in the HIGH Z state when either

is HIGH or

or CE

is LOW.

Package options for the P4C164LL include 28-pin 300 and

600 mil DIP and 28-pin 330 mil SOP packages.

FUnCTIOnAL BLOCk DIAgRAM

PIn COnFIgURATIOnS

DIP (P5, P6, C5-1), SOP (S5)

TOP VIEW

Document #

SRAM116

REV C

Revised March 2010

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