All other packages .......................................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 1)
26 CSBGA
Junction-to-Ambient Thermal Resistance (
θ
J
A
)...........85°C/W
Junction-to-Case Thermal Resistance (
θ
J
C
)................23°C/W
28 PLCC
Junction-to-Ambient Thermal Resistance (
θ
J
A
)...........44°C/W
Junction-to-Case Thermal Resistance (
θ
J
C
)................10°C/W
48 LQFP
Junction-to-Ambient Thermal Resistance (
θ
J
A
)...........44°C/W
Junction-to-Case Thermal Resistance (
θ
J
C
)................10°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
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Embedded System
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