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PDM31532LA20TATY

Description
Standard SRAM, 64KX16, 20ns, CMOS, PDSO44, PLASTIC, TSOP2-44
Categorystorage    storage   
File Size279KB,9 Pages
ManufacturerIXYS
Environmental Compliance  
Download Datasheet Parametric View All

PDM31532LA20TATY Overview

Standard SRAM, 64KX16, 20ns, CMOS, PDSO44, PLASTIC, TSOP2-44

PDM31532LA20TATY Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?incompatible
MakerIXYS
Parts packaging codeTSOP2
package instructionPLASTIC, TSOP2-44
Contacts44
Reach Compliance Codeunknown
ECCN code3A991.B.2.B
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G44
length18.41 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize64KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP44,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Minimum standby current3.14 V
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
PDM31532
PDM31532
64K x 16 CMOS
3.3V Static RAM
Features
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Description
The PDM31532 is a high-performance CMOS static
RAM organized as 65,536 x 16 bits. The PDM31532
features low power dissipation using chip enable
(CE) and has an output enable input (OE) for fast
memory access. Byte access is supported by upper
and lower byte controls.
The PDM31532 operates from a single 3.3V power
supply and all inputs and outputs are fully TTL-
compatible.
The PDM31532 is available in a 44-pin 400 mil plas-
tic SOJ and a plastic TSOP (II) package for high-
density surface assembly and is suitable for use in
high-speed applications requiring high-speed
storage.
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High-speed access times
- Com’l: 9, 10, 12, 15 and 20 ns
- Ind: 12, 15 and 20 ns
Low power operation (typical)
- PDM31532LA
Active: 200 mW
Standby: 10 mW
- PDM31532SA
Active: 250 mW
Standby: 20 mW
High-density 64K x 16 architecture
3.3V (±0.3V) power supply
Fully static operation
TTL-compatible inputs and outputs
Output buffer controls: OE
Data byte controls: LB, UB
Packages:
Plastic SOJ (400 mil) - SO
Plastic TSOP - T (II)
Functional Block Diagram
Row Address
Buffer
Row Decoder
Vcc
Vss
A8-A0
Memory
Cell
Array
256 x 128 x 32
32K x 32
8
9
10
11
I/O15-I/O0
Data
Input/
Output
Buffer
Sense Amp
Column
Decoder
WE
OE
UB
LB
CE
Control
Logic
Clock
Generator
Column
Address
Buffer
12
A15-A9
Rev. 4.3 - 3/27/98
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