LS3N163
P-CHANNEL MOSFET
The LS3N163 is an enhancement mode P-Channel Mosfet
The LS3N163 is an enhancement mode P-Channel
Mosfet designed for use as a General Purpose amplifier
or switch
The hermetically sealed TO-72 package is well suited
for high reliability and harsh environment applications.
FEATURES
DIRECT REPLACEMENT FOR INTERSIL LS3N163
ABSOLUTE MAXIMUM RATINGS
1
@ 25°C (unless otherwise noted)
‐65°C to +200°C
‐55°C to +150°C
375mW
50mA
‐40V
‐40V
±125V
CONDITIONS
V
GS
= ‐40V, V
DS
= 0V
I
D
= ‐10µA, V
GS
= 0V
I
S
= ‐10µA, V
GD
= 0V, V
BD
= 0V
V
DS
= V
GS
, I
D
= ‐10µA
V
DS
= ‐15V, I
D
= ‐10µA
V
DS
= ‐15V, I
D
= ‐0.5mA
V
DS
= ‐15V, V
GS
= 0V
V
DS
= 15V, V
GS
= V
DB
= 0V
V
GS
= ‐20V, I
D
= ‐100µA
V
DS
= ‐15V, V
GS
= ‐10V
V
DS
= ‐15V, I
D
= ‐10mA , f = 1kHz
Maximum Temperatures
Storage Temperature
(See Packaging Information).
Operating Junction Temperature
Maximum Power Dissipation
Continuous Power Dissipation
LS3N163 Features:
MAXIMUM CURRENT
Very high Input Impedance
Drain Current
Low Capacitance
MAXIMUM VOLTAGES
High Gain
Drain to Gate
High Gate Breakdown Voltage
Drain to Source
Low Threshold Voltage
Peak Gate to Source
2
LS3N163 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
CHARACTERISTIC
MIN
TYP.
MAX
UNITS
I
GSSF
Gate Forward Current
‐10
‐‐
‐‐
pA
T
A
= +125°C
‐‐
‐‐
‐25
BV
DSS
Drain to Source Breakdown Voltage
‐40
‐‐
‐‐
BV
SDS
Source‐Drain Breakdown Voltage
‐40
‐‐
‐‐
V
V
GS(th)
Gate to Source Threshold Voltage
‐2.0
‐‐
‐5.0
‐2.0
‐‐
‐5.0
V
GS
Gate Source Voltage
‐3.0
‐‐
‐6.5
I
DSS
Drain Leakage Current “Off”
‐‐
‐‐
200
pA
I
SDS
Source Drain Current
‐‐
‐‐
400
r
DS(on)
Drain to Source “On” Resistance
‐‐
‐‐
250
Ω
I
D(on)
Drain Current “On”
‐5.0
‐‐
‐30
mA
g
fs
Forward Transconductance
2000
‐‐
4000
µS
g
os
Output Admittance
‐‐
‐‐
250
C
iss
Input Capacitance–Output shorted
‐‐
‐‐
2.5
pF
V
DS
= ‐15V, I
D
= ‐10mA , f = 1MHz
3
C
rss
Reverse Transfer Capacitance
‐‐
‐‐
0.7
C
oss
Output Capacitance‐Input shorted
‐‐
‐‐
3.0
SWITCHING CHARACTERISTICS ‐ T
A
= 25°C and V
BS
= 0 unless otherwise noted TIMING WAVEFORMS
SYMBOL
CHARACTERISTIC
MAX
UNITS
CONDITIONS
t
d(on)
Turn On Delay Time
12
V
DD
= ‐15V
ns
I
D(on)
= ‐10mA
t
r
Turn On Rise Time
24
3
R
G
= R
L
= 1.4KΩ
t
off
Turn Off Time
50
SWITCHING TEST CIRCUIT
Click To Buy
Available Packages:
LS3N163 in TO-72
LS3N163 in bare die.
TO-72 (Bottom View)
Note 1 ‐ Absolute maximum ratings are limiting values above which LS3N163 serviceability may be impaired.
Note 2 – Device must not be tested at ±125V more than once or longer than 300ms.
Note 3 – For design reference only, not 100% tested
Micross Components Europe
Tel: +44 1603 788967
Email:
chipcomponents@micross.com
Web:
http://www.micross.com/distribution
Please contact Micross for full
package and die dimensions
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed
for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Linear Integrated Systems.
Micross Components Ltd, United Kingdom, Tel: +44 1603 788967, Fax: +44 1603788920, Email:
chipcomponents@micross.com
Web:
www.micross.com/distribution.aspx
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