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LS5114_TO-18

Description
P-CHANNEL JFET
File Size305KB,2 Pages
ManufacturerMicross
Websitehttps://www.micross.com
Download Datasheet View All

LS5114_TO-18 Overview

P-CHANNEL JFET

LS5114
P-CHANNEL JFET
Linear Systems replaces discontinued Siliconix 2N5114
This analog switch is designed for inverting switching
into inverting input of an Operational Amplifier.
The hermetically sealed TO-18 package is well suited
for hi-reliability and harsh environment applications.
(See Packaging Information).
FEATURES 
DIRECT REPLACEMENT FOR SILICONIX 2N5114 
LOW ON RESISTANCE 
r
DS(on) 
≤ 75Ω 
LOW CAPACITANCE 
6pF 
ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted) 
Maximum Temperatures 
Storage Temperature 
‐55°C to +200°C 
LS5114 Benefits:
Operating Junction Temperature 
‐55°C to +200°C 
Low On Resistance
Maximum Power Dissipation 
I
D(off)
500 pA
Continuous Power Dissipation  
500mW 
Switches directly from TTL logic
MAXIMUM CURRENT
LS5114 Applications:
Gate Current (Note 1) 
I
G
 = ‐50mA 
Analog Switches
MAXIMUM VOLTAGES 
Commutators
Gate to Drain Voltage 
V
GDS
 = 30V 
Choppers
Gate to Source Voltage 
V
GSS
 = 30V 
LS5114 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTIC 
MIN 
TYP. 
MAX 
UNITS 
CONDITIONS 
BV
GSS
 
Gate to Source Breakdown Voltage 
30 
‐‐ 
‐‐ 
 
I
= 1µA,   V
DS
 = 0V 
 
V
GS(off)
 
Gate to Source Cutoff Voltage 
‐‐ 
10 
V
DS
 = ‐15V, I
D
 = ‐1nA 
V
GS(F)
 
Gate to Source Forward Voltage 
‐‐ 
‐0.7 
‐1 
I
= ‐1mA,   V
DS
 = 0V 
 
 
‐‐ 
‐1.0 
‐1.3 
V
GS
 = 0V, I
D
 = ‐15mA 
V
DS(on)
 
Drain to Source On Voltage 
‐‐ 
‐0.7 
‐‐ 
V
GS
 = 0V, I
D
 = ‐7mA 
‐‐ 
‐0.5 
‐‐ 
V
GS
 = 0V, I
D
 = ‐3mA 
I
DSS
 
Drain to Source Saturation Current (Note 2) 
‐30 
‐‐ 
‐90 
mA 
V
DS
 = ‐18V, V
GS 
= 0V 
I
GSS
 
Gate Reverse Current 
‐‐ 
500 
 
V
GS 
= 20V,  V
DS
 = 0V 
 
I
G
 
Gate Operating Current 
‐‐ 
‐5 
‐‐ 
V
DS
 = ‐15V,  I
D
 = ‐1mA 
pA 
 
 
‐‐ 
‐10 
‐500 
V
DS
 = ‐15V, V
GS 
= 12V 
 
I
D(off)
 
Drain Cutoff Current 
‐‐ 
‐10 
‐‐ 
V
DS
 = ‐15V, V
GS 
= 7V 
‐‐ 
‐10 
‐‐ 
V
DS
 = ‐15V, V
GS 
= 5V 
r
DS(on)
 
Drain to Source On Resistance 
‐‐ 
‐‐ 
75 
Ω 
I
= ‐1mA,   V
GS
 = 0V 
LS5114 DYNAMIC ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) 
SYMBOL 
CHARACTERISTIC 
MIN 
TYP. 
MAX 
UNITS 
CONDITIONS 
g
fs
 
Forward Transconductance 
‐‐ 
4.5 
‐‐ 
mS 
V
DS
 = ‐15V,  I
D
 = 1mA , f = 1kHz 
g
os
 
Output Conductance 
‐‐ 
20 
‐‐ 
µS 
r
DS(on)
 
Drain to Source On Resistance 
‐‐ 
‐‐ 
75 
Ω 
I
= 0A,   V
GS
 = 0V,   f = 1kHz 
C
iss
 
Input Capacitance 
‐‐ 
20 
25 
 
V
DS
 = ‐15V, V
GS 
= 0V, f = 1MHz 
pF 
 
‐‐ 
V
DS
 = 0V, V
GS 
= 12V, f = 1MHz 
 
C
rss
 
Reverse Transfer Capacitance 
‐‐ 
‐‐ 
V
DS
 = 0V, V
GS 
= 7V, f = 1MHz 
‐‐ 
‐‐ 
V
DS
 = 0V, V
GS 
= 5V, f = 1MHz 
e
n
 
Equivalent Noise Voltage 
‐‐ 
20 
‐‐ 
nV/√Hz 
V
DG
 = 10V,  I
D
 = 10mA , f = 1kHz 
LS5114 SWITCHING CHARACTERISTICS @ 25°C (unless otherwise noted) 
SYMBOL 
CHARACTERISTIC 
 
UNITS 
CONDITIONS 
Click To Buy
Turn On Time 
Turn On Rise Time 
Turn Off Time 
Turn Off Fall Time 
10 
15 
 
 
ns 
V
GS
(L) = ‐11V 
V
GS
(H) = 0V 
 
See Switching Circuit 
‐10V 
20V 
430Ω 
100Ω 
‐15mA 
 
 
 
 
 
Available Packages:
LS5114 in TO-18
LS5114 in bare die.
Please contact Micross for full
package and die dimensions
Tel: +44 1603 788967
Email:
chipcomponents@micross.com
Web:
http://www.micross.com/distribution
TO-18 (Bottom View)
t
d(on)
 
t
r
 
t
d(off)
 
t
f
 
Note 1 ‐ Absolute maximum ratings are limiting values above which LS5114 serviceability may be impaired.  Note 2 – Pulse test: PW≤ 300 µs, Duty Cycle ≤ 3% 
                                                                                                                 
LS5114 SWITCHING CIRCUIT PARAMETERS                                                                                                                          
V
DD
 
V
GG
 
R
L
 
R
G
 
I
D(on)
 
SWITCHING TEST CIRCUIT
Micross Components Europe
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

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