LS831_PDIP datasheet, PDF - EEWORLD Datasheet

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LS831_PDIP: DescriptionMONOLITHIC DUAL NPN TRANSISTOR; File Size279KB，2 Pages; ManufacturerMicross; Websitehttps://www.micross.com

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MONOLITHIC DUAL NPN TRANSISTOR

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LS831

MONOLITHIC DUAL

N-CHANNEL JFET

Linear Systems Ultra Low Leakage Low Drift Monolithic Dual JFET

The LS831 is a high-performance monolithic dual

JFET featuring extremely low noise, tight offset voltage

and low drift over temperature specifications, and is

targeted for use in a wide range of precision

instrumentation applications. The LS831 features a 25-

mV offset and 10-µV/°C drift.

The 8 Pin P-DIP and 8 Pin SOIC provide ease of

manufacturing, and the symmetrical pinout prevents

improper orientation.

(See Packaging Information).

FEATURES

ULTRA LOW DRIFT

| V

GS1‐2

/ T| ≤10µV/°C

ULTRA LOW LEAKAGE

I

G

= 80fA TYP.

LOW NOISE

e

n

= 70nV/√Hz TYP.

LOW CAPACITANCE

C

ISS

= 3pF MAX.

ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted)

Maximum Temperatures

Storage Temperature

‐65°C to +150°C

Operating Junction Temperature

+150°C

Maximum Voltage and Current for Each Transistor – Note 1

‐V

GSS

Gate Voltage to Drain or Source

40V

‐V

DSO

Drain to Source Voltage

40V

‐I

G(f)

Gate Forward Current

10mA

‐I

G

Gate Reverse Current

10µA

Maximum Power Dissipation

Device Dissipation @ Free Air – Total 400mW @ +125°C

MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED

SYMBOL

CHARACTERISTICS VALUE UNITS CONDITIONS

| V

GS1‐2

/ T| max.

DRIFT VS.

10

µV/°C V

DG

=10V, I

D

=30µA

TEMPERATURE

T

A

=‐55°C to +125°C

| V

GS1‐2

| max.

OFFSET VOLTAGE

25

mV

V

DG

=10V, I

D=

30µA

TYP.

60

‐‐

300

100

0.6

‐‐

1

2

‐‐

5

1

‐‐

90

‐‐

20

‐‐

MAX.

‐‐

500

200

3

10

5

4.5

4

0.1

0.2

0.5

‐‐

5

0.5

‐‐

1

70

3

1.5

0.1

UNITS

V

µmho

%

mA

%

V

pA

nA

pA

nA

pA

µmho

dB

CONDITIONS

V

DS

= 0 I

D

=1nA

I

G

= 1nA I

D

= 0 I

S

= 0

V

DG

= 10V V

GS

= 0V f = 1kHz

V

DG

= 10V I

D

= 30µA f = 1kHz

V

DG

= 10V V

GS

= 0V

V

DS

= 10V I

D

= 1nA

V

DS

=10V I

D

=30µA

V

DG

= 10V I

D

= 30µA

T

A

= +125°C

V

DS

=0

V

GS

= 0V, V

GS

= ‐20V, T

A

= +125°C

V

GG

= 20V

V

DG

= 10V V

GS

= 0V

V

DG

= 10V I

D

= 30µA

∆V

DS

= 10 to 20V I

D

=30µA

∆V

DS

= 5 to 10V I

D

=30µA

V

DS

= 10V V

GS

= 0V R

G

= 10MΩ

f= 100Hz NBW= 6Hz

V

DS

=10V I

D

=30µA f=10Hz NBW=1Hz

V

DS

= 10V, V

GS

= 0V, f= 1MHz

V

DS

= 10V, V

GS

= 0V, f= 1MHz

V

DS

= 10V, I

D

=30µA

LS831 Applications:

Wideband Differential Amps

High-Speed,Temp-Compensated Single-

Ended Input Amps

High-Speed Comparators

Impedance Converters and vibrations

detectors.

ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

SYMBOL

CHARACTERISTICS

MIN.

BV

GSS

Breakdown Voltage

40

BV

GGO

Gate‐To‐Gate Breakdown

40

TRANSCONDUCTANCE

Y

fSS

Full Conduction

70

Y

fS

Typical Operation

50

|Y

FS1‐2

/ Y

FS

|

Mismatch

‐‐

DRAIN CURRENT

I

DSS

Full Conduction

0.5

|I

DSS1‐2

/ I

DSS

|

Mismatch at Full Conduction

‐‐

GATE VOLTAGE

V

GS

(off) or V

p

Pinchoff voltage

0.6

V

GS

(on)

Operating Range

‐‐

GATE CURRENT

‐I

G

max.

Operating

‐‐

‐I

G

max.

High Temperature

‐‐

‐I

GSS

max.

At Full Conduction

‐‐

‐I

GSS

max.

High Temperature

5

I

GGO

Gate‐to‐Gate Leakage

‐‐

OUTPUT CONDUCTANCE

Y

OSS

Full Conduction

‐‐

Y

OS

Operating

‐‐

COMMON MODE REJECTION

CMR

‐20 log | V

GS1‐2

/ V

DS

|

‐‐

‐20 log | V

GS1‐2

/ V

DS

|

‐‐

NOISE

NF

Figure

‐‐

e

n

Voltage

‐‐

CAPACITANCE

C

ISS

Input

‐‐

C

RSS

Reverse Transfer

‐‐

C

DD

Drain‐to‐Drain

‐‐

Click To Buy

dB

nV/√Hz

pF

Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired

PDIP & SOIC (Top View)

Available Packages:

LS831 / LS831 in PDIP & SOIC

LS831 / LS831 available as bare die

Please contact

Micross

for full package and die dimensions

Tel: +44 1603 788967

Email:

chipcomponents@micross.com

Web:

http://www.micross.com/distribution

Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or

other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

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