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FDMC6296

Description
11500mA, 30V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, 3.30 X 3.30 MM, ROHS COMPLIANT, MLP, 8 PIN
CategoryDiscrete semiconductor    The transistor   
File Size975KB,8 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
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FDMC6296 Overview

11500mA, 30V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, 3.30 X 3.30 MM, ROHS COMPLIANT, MLP, 8 PIN

FDMC6296 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRochester Electronics
package instruction3.30 X 3.30 MM, ROHS COMPLIANT, MLP, 8 PIN
Contacts8
Reach Compliance Codeunknown
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain current (ID)11.5 A
Maximum drain-source on-resistance0.0105 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)225 pF
JESD-30 codeS-PDSO-N5
JESD-609 codee4
Humidity sensitivity level1
Number of components1
Number of terminals5
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeSQUARE
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeN-CHANNEL
Certification statusCOMMERCIAL
surface mountYES
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON

FDMC6296 Preview

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FDMC6296 N-Channel Power Trench
®
MOSFET
FDMC6296
Single N-Channel Logic-Level Power Trench
®
MOSFET
30 V, 11.5 A, 10.5 mΩ
Features
Max r
DS(on)
= 10.5 mΩ at V
GS
= 10 V, I
D
= 11.5 A
Max r
DS(on)
= 15 mΩ at V
GS
= 4.5 V, I
D
= 10 A
Low Qg, Qgd and Rg for efficient switching performance
RoHS Compliant
November 2010
General Description
This single N-Channel MOSFET in the thermally efficient
MicroFET Package has been specifically designed to perform
well in Point of Load converters. Providing an optimized balance
between r
DS(on)
and gate charge this device can be effectively
used as a “high side” control swtich or “low side” synchronous
rectifier.
Application
Point of Load Converters
1/16 Brick Synchronous Rectifier
Top
Pin 1
S
S
S
G
Bottom
D
D
D
D
D
D
D
D
8
1
S
5
6
7
4
3
2
G
S
S
MLP 3.3X3.3
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
I
D
P
D
T
J
, T
STG
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Power Dissipation
Power Dissipation
-Continuous
-Pulsed
T
C
= 25 °C
T
A
= 25 °C
(Note 1a)
T
A
= 25 °C
(Note 1a)
Parameter
Ratings
30
±20
11.5
40
2.1
0.9
-55 to +150
W
°C
Units
V
V
A
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
(Note 1)
(Note 1a)
3
53
°C/W
Package Marking and Ordering Information
Device Marking
FDMC6296
Device
FDMC6296
Package
MLP 3.3X3.3
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
1
www.fairchildsemi.com
FDMC6296 N-Channel Power Trench
®
MOSFET
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= 250
μA,
V
GS
= 0 V
I
D
= 250
μA,
referenced to 25 °C
V
DS
= 24 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
30
26
1
±100
V
mV/°C
μA
nA
On Characteristics
V
GS(th)
ΔV
GS(th)
ΔT
J
r
DS(on)
g
FS
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= V
DS
, I
D
= 250
μA
I
D
= 250
μA,
referenced to 25 °C
V
GS
= 10 V, I
D
= 11.5 A
V
GS
= 4.5 V, I
D
= 10 A
V
GS
= 10 V, I
D
= 11.5 A, T
J
= 125 °C
V
DD
= 5 V, I
D
= 11.5 A
1
1.8
-6
8.7
10.6
13
49
10.5
15
17
S
3
V
mV/°C
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS
= 15 V, V
GS
= 0 V,
f = 1 MHz
V
GS
= 0 V, f = 1 MHz
1610
406
150
0.9
2141
540
225
pF
pF
pF
Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 5V
Total Gate Charge
Gate to Drain “Miller” Charge
V
GS
= 5 V
V
DD
= 15 V,
I
D
= 11.5 A
V
DD
= 15 V, I
D
= 1.0 A,
V
GS
= 10 V, R
GEN
= 6
Ω
10
3
27
8
14
4
4
20
10
43
16
19
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0 V, I
S
= 2 A
(Note 2)
0.7
30
22
1.2
V
ns
nC
I
F
= 11.5 A, di/dt = 100 A/μs
Notes:
1. R
θJA
is determined with the device mounted on a 1in
2
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJC
is guaranteed by design while R
θCA
is determined by
the user's board design.
a. 53 °C/W when mounted on a
1 in
2
pad of 2 oz copper
b. 125 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300
μs,
Duty cycle < 2.0%.
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
2
www.fairchildsemi.com
FDMC6296 N-Channel Power Trench
®
MOSFET
Typical Characteristics
T
J
= 25°C unless otherwise noted
40
V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
5
V
GS
= 4.5 V
V
GS
= 3 V
I
D
, DRAIN CURRENT (A)
4
3
V
GS
= 3.5 V
30
V
GS
= 4 V
V
GS
= 3.5 V
20
V
GS
= 3 V
2
1
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 4.5 V
V
GS
= 4 V
10
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
0
0.0
0
0
10
20
I
D
,
DRAIN CURRENT (A)
30
40
0.5
1.0
1.5
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
2.0
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
60
SOURCE ON-RESISTANCE
(
m
Ω
)
1.6
1.4
1.2
1.0
0.8
0.6
-75
I
D
= 11.5 A
V
GS
= 10 V
r
DS(on),
DRAIN TO
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
I
D
= 11.5 A
40
20
T
J
= 125
o
C
T
J
= 25
o
C
-50
-25
0
25 50 75 100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
0
2
4
6
8
10
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
40
I
S
, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance vs Gate to
Source Voltage
40
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
I
D
, DRAIN CURRENT (A)
30
V
DS
= 5 V
T
J
= 125
o
C
10
T
J
= 150
o
C
T
J
= 25
o
C
20
T
J
= 25
o
C
1
T
J
= -55
o
C
10
T
J
= -55
o
C
0
0
1
2
3
4
5
0.1
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
3
www.fairchildsemi.com
FDMC6296 N-Channel Power Trench
®
MOSFET
Typical Characteristics
T
J
= 25°C unless otherwise noted
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
3000
I
D
= 11.5 A
V
DD
= 15 V
CAPACITANCE (pF)
8
V
DD
= 10 V
1000
C
iss
6
V
DD
= 20 V
4
2
0
C
oss
100
C
rss
f = 1 MHz
V
GS
= 0 V
0
3
6
9
12
15
50
0.1
1
10
30
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
12
I
D
,
DRAIN CURRENT (A)
20
I
AS
, AVALANCHE CURRENT (A)
10
T
J
= 25
o
C
T
J
= 100
o
C
9
V
GS
= 10 V
6
V
GS
= 4.5 V
T
J
= 125
o
C
3
R
θ
JA
= 53 C/W
o
1
0.1
1
10
100 200
0
25
50
75
100
o
125
150
t
AV
, TIME IN AVALANCHE (ms)
T
A
,
AMBIENT TEMPERATURE
(
C
)
Figure 9. Unclamped Inductive
Switching Capability
50
P
(
PK
)
,
PEAK TRANSIENT POWER (W)
1 ms
I
D
, DRAIN CURRENT (A)
Figure 10. Maximum Continuous Drain
Current vs Ambient Temperature
1000
V
GS
= 10 V
10
10 ms
THIS AREA IS
LIMITED BY r
DS(on)
100
1
100 ms
SINGLE PULSE
T
J
= MAX RATED
10
SINGLE PULSE
R
θ
JA
= 125
o
C/W
T
A
= 25
o
C
1s
10 s
DC
0.1
0.05
0.01
R
θ
JA
= 125 C/W
T
A
= 25 C
o
o
0.1
1
10
100200
1
-3
10
10
-2
10
-1
1
10
100
1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
4
www.fairchildsemi.com
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