Freescale Semiconductor
Technical Data
Document Number: MC33903_4_5
Rev. 6.0, 4/2011
SBC Gen2 with CAN High Speed
and LIN Interface
The 33903/4/5 is the second generation family of the System Basis
Chip (SBC). It combines several features and enhances present
module designs. The device works as an advanced power
management unit for the MCU with additional integrated circuits such
as sensors, and CAN transceivers. It has a built-in enhanced high
speed CAN interface (ISO11898-2 and -5) with local and bus failure
diagnostics, protection, and Fail Safe Operation Modes. The SBC may
include zero, one or two LIN 2.1 interfaces with LIN output pin switches.
It includes up to four Wake-Up input pins that can also be configured as
output drivers for flexibility.
This device implements multiple Low Power (LP) Modes, with very
low-current consumption. In addition, the device is part of a family
concept where pin compatibility adds versatility to module design.
The 33903/4/5 also implements an innovative and advanced fail-safe
state machine and concept solution.
33903/
33903/4/5
SYSTEM BASIS CHIP
EK Suffix (Pb-Free)
98ASA10556D
32-PIN SOIC
EK Suffix (Pb-Free)
98ASA10506D
54-PIN SOIC
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
possibility of usage external PNP to extend current capability and
share power dissipation
• Voltage, current, and temperature protection
• Extremely low quiescent current in (LP) Modes
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple under-voltage detections to address various MCU
specifications and system operation modes (i.e. cranking)
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs,
with over-current detection and under-voltage protection
• MUX (except 33903) output pin for device internal analog signal
monitoring and power supply monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins
diagnostics and monitoring.
• Multiple Wake-Up sources in (LP) Modes: CAN or LIN bus, I/O
transition, automatic timer, SPI message, and V
DD
over-current
detection.
• ISO11898-5 high speed CAN interface compatibility for baud rates of
40 kb/s to 1.0 Mb/s
ORDERING INFORMATION
See
Table of Contents 2
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2010 - 2011. All rights reserved.
TABLE OF CONTENTS
TABLE OF CONTENTS
Simplified Application Diagrams ................................................................................................................. 3
Device Variations ....................................................................................................................................... 6
Internal Block Diagrams ............................................................................................................................. 7
Pin Connections ....................................................................................................................................... 12
Electrical Characteristics .......................................................................................................................... 17
Maximum Ratings .................................................................................................................................. 17
Static Electrical Characteristics ............................................................................................................. 19
Dynamic Electrical Characteristics ........................................................................................................ 27
Timing Diagrams ................................................................................................................................... 30
Functional Description .............................................................................................................................. 34
Introduction ............................................................................................................................................ 34
Functional Pin Description ..................................................................................................................... 34
Functional Device Operation .................................................................................................................... 38
Mode and State Description .................................................................................................................. 38
LP Modes .............................................................................................................................................. 39
State Diagram ........................................................................................................................................ 40
Mode Change ........................................................................................................................................ 41
Watchdog Operation .............................................................................................................................. 41
Functional Block Operation Versus Mode ............................................................................................. 43
Illustration of Device Mode Transitions. ................................................................................................. 44
Cyclic Sense Operation During LP Modes ............................................................................................ 46
Behavior at Power Up and Power Down ............................................................................................... 48
Fail Safe Operation .................................................................................................................................. 50
CAN Interface ........................................................................................................................................ 54
CAN Interface Description ..................................................................................................................... 54
CAN Bus Fault Diagnostic ..................................................................................................................... 57
LIN Block .................................................................................................................................................. 60
LIN Interface Description ....................................................................................................................... 60
LIN Operational Modes .......................................................................................................................... 60
Serial Peripheral Interface ........................................................................................................................ 62
High Level Overview .............................................................................................................................. 62
Detail Operation ..................................................................................................................................... 63
Detail of Control Bits And Register Mapping ......................................................................................... 66
Flags and Device Status ........................................................................................................................ 83
Typical Applications ................................................................................................................................. 90
Packaging ................................................................................................................................................ 97
33903/4/5
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
SIMPLIFIED APPLICATION DIAGRAMS
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
33905D
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
TXD-L2
RXD-L2
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
LIN Bus
LIN Bus
CANL
LIN-TERM 1
LIN-1
LIN-TERM 2
LIN-2
Figure 1. 33905D Simplified Application Diagram
V
BAT
D1
33905S
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L
RXD-L
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
V
BAT
CANL
LIN-T
LIN
I/O-3
LIN Bus
Figure 2. 33905S Simplified Application Diagram
33903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
33904
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
V
DD
SPI
A/D
MCU
I/O-1
CANH
V
BAT
SPLIT
CAN Bus
CANL
I/O-2
I/O-3
Figure 3. 33904 Simplified Application Diagram
V
BAT
D1
33903
VSUP1
DBG
SAFE
GND
VSUP2
VDD
RST
V
DD
INT
MOSI
SCLK
MISO
CS
SPI
I/O-0
MCU
CANH
CAN Bus
5V-CAN
TXD
RXD
SPLIT
CANL
Figure 4. 33903 Simplified Application Diagram
33903/4/5
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
33903D
Q1*
* = Optional
V
DD
VSUP
SAFE
DBG
GND
VSENSE
IO-0
VE VB VDD
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
TXD-L2
RXD-L2
SPI
A/D
MCU
CANH
SPLIT
CAN Bus
LIN Bus
LIN Bus
CANL
LIN-T1/I/O-2
LIN-1
LIN-T2/IO-3
LIN-2
Figure 5. 33903D Simplified Application Diagram
V
BAT
D1
33903S
Q1*
* = Optional
VSUP
SAFE
DBG
GND
VSENSE
IO-0
VE VB
VDD
RST
INT
V
DD
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
SPI
A/D
MCU
CANH
SPLIT
V
BAT
CAN Bus
LIN Bus
CANL
LIN-T1/I/O-2
LIN-1
I/O-3
Figure 6. 33903S Simplified Application Diagram
33903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
5