Preliminary Data Sheet
April 2004
AGR21125E
125 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET
Introduction
The AGR21125E is a high-voltage, gold-metalized,
enhancement mode, laterally diffused metal oxide
semiconductor (LDMOS) RF power transistor suit-
able for wideband code division multiple access
(W-CDMA), single and multicarrier class AB wireless
base station power amplifier applications.
)
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
AGR21125EU
AGR21125EF
Sym
Value
Unit
R
θJC
R
θJC
0.5
0.5
°C/W
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Total Dissipation at T
C
= 25 °C:
AGR21125EU
AGR21125EF
Derate Above 25
°C:
AGR21125EU
AGR21125EF
Operating Junction Tempera-
ture
Storage Temperature Range
Sym Value Unit
V
DSS
65
Vdc
V
GS
–0.5, +15 Vdc
P
D
P
D
—
—
T
J
350
350
2.0
2.0
200
W
W
W/°C
W/°C
°C
5B 03 STYLE 1
AGR21125EU (unflanged)
AGR21125EF (flanged)
Figure 1. Available Packages
Features
s
s
s
s
s
s
s
s
Typical performance for two carrier 3GPP
W-CDMA systems. F1 = 2135 MHz and
F2 = 2145 MHz with 3.84 MHz channel BW, adja-
cent channel BW = 3.84 MHz at F1 – 5 MHz and
F2 + 5 MHz. Third-order distortion is measured
over 3.84 MHz BW at F1 – 10 MHz and
F2 + 10 MHz. Typical P/A ratio of 8.5 dB at 0.01%
(probability) CCDF:
— Output power: 28 W.
— Power gain: 14 dB.
— Efficiency: 27%.
— IM3: –34.5 dBc.
— ACPR: –38 dBc.
— Return loss: –10 dB.
High-reliability, gold-metalization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
Device can withstand a 10:1 voltage standing wave
ratio (VSWR) at 28 Vdc, 2140 MHz, 125 W contin-
uous wave (CW) output power.
Large signal impedance parameters available.
T
STG
–65, +150 °C
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR21125E
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR21125E
125 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET
Preliminary Data Sheet
April 2004
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: T
C
= 30 °C.
Table 4. dc Characteristics
Parameter
Off Characteristics
Drain-source Breakdown Voltage (V
GS
= 0, I
D
= 200 µA)
Gate-source Leakage Current (V
GS
= 5 V, V
DS
= 0 V)
Zero Gate Voltage Drain Leakage Current (V
DS
= 28 V, V
GS
= 0 V)
On Characteristics
Forward Transconductance (V
DS
= 10 V, I
D
= 1 A)
Gate Threshold Voltage (V
DS
= 10 V, I
D
= 400 µA)
Gate Quiescent Voltage (V
DS
= 28 V, I
D
= 1200 mA)
Drain-source On-voltage (V
GS
= 10 V, I
D
= 1 A)
Table 5. RF Characteristics
Parameter
Dynamic Characteristics
Reverse Transfer Capacitance
(V
DS
= 28 V, V
GS
= 0, f = 1.0 MHz)
(This part is internally matched on both the input and output.)
Common-source Amplifier Power Gain*
Drain Efficiency*
Third-order Intermodulation Distortion*
(IMD3 measured over 3.84 MHz BW @ f1 – 10 MHz
and f2 + 10 MHz)
Adjacent Channel Power Ratio*
(ACPR measured over BW of 3.84 MHz @ f1 – 5 MHz
and f2 + 5 MHz)
Input Return Loss*
Power Output, 1 dB Compression Point
(V
DD
= 28 V, f
C
= 2140.0 MHz)
Output Mismatch Stress
(V
DD
= 28 V, P
OUT
= 125 W (CW), I
DQ
= 1200 mA, f
C
= 2140.0 MHz
VSWR = 10:1; [all phase angles])
C
RSS
—
3.0
—
pF
Symbol
Min
Typ
Max
Unit
G
FS
V
GS(TH)
V
GS(Q)
V
DS(ON)
—
—
—
—
9
—
3.8
0.08
—
4.8
—
—
S
Vdc
Vdc
Vdc
V
(BR)DSS
I
GSS
I
DSS
65
—
—
—
—
—
—
4
12
Vdc
µAdc
µAdc
Symbol
Min
Typ
Max
Unit
Functional Tests (in Agere Systems Supplied Test Fixture)
G
PS
η
IM3
12
25
—
14
27
–34.5
—
—
–33
dB
%
dBc
ACPR
—
–38
–37
dBc
IRL
P1dB
ψ
—
115
–10
125
–9
—
dB
W
No degradation in output power.
* 3GPP W-CDMA, typical P/A ratio of 8.5 dB at 0.01% CCDF, f1 = 2135.0 MHz, and f2 = 2145 MHz.
V
DD
= 28 Vdc, I
DQ
= 1200 mA, and P
OUT
= 28 W avg.
2
Agere Systems Inc.
Preliminary Data Sheet
April 2004
AGR21125E
125 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET
Test Circuit Illustrations for AGR21125E
FB1
V
GG
R1
+
R2
C2
C3
C4
C5
Z6
Z7
Z14
Z1
RF INPUT
C1
Z2
Z3
Z4
Z5
2
1
DUT
3
+
+
C18
Z8
Z9
Z10
Z11
Z12
C16
Z13
RF
OUTPUT
V
DD
+
R3
+
+
V
DD
C12D C9D C8D C6A C7A C8A C9A C10A C11A C12A C13A C14A C15A
C12C C9C C8C C6B C7B C8B C9B C10B C11B C12B C13B C14B C15B
PINS: 1. DRAIN, 2. GATE, 3. SOURCE
A. Schematic
2
3
1
Parts List:
s
Microstrip Line:
Z1 0.785 in. x 0.065 in.
Z2 0.205 in. x 0.065 in.
Z3 0.070 in. x 0.255 in.
Z4 0.315 in. x 0.065 in.
Z5 0.240 in. x 0.860 in.
Z6 0.050 in. x 0.467 in.
Z7 0.050 in. x 0.367 in.
Z8 0.500 in. x 1.050 in.
Z9 0.248 in. x 0.185 in.
Z10 0.075 in. x 0.320 in.
Z11 0.465 in. x 0.115 in.
Z12 0.075 in. x 0.065 in.
Z13 0.252 in. x 0.065 in.
Z14 0.050 in. x 0.367 in.
s
WB1, WB2; 10 mil thick, 0.6 in. x 0.18 in.
®
s
Fair-Rite
ferrite bead: FB1 2743019447.
®
s
Vitramon
1206 size chip capacitor:
C3, C9A, C9B, C9C, C9D 22000 pF.
s
1206 size chip capacitor: 22000 pF
C12A, C12B, C12C, C12D, C13A, C13B.
s
1206 size chip resistor:
R1 1 kΩ;
R2 560 kΩ;
R3 4.7
Ω.
®
s
Taconic
ORCER RF-35 board material,
2 oz. copper, 30 mil thickness,
ε
r = 3.5.
s
s
s
s
ATC
®
chip capacitor: C1 10 pF 100B100JW500X; C5, C14A, C14B, C15A, C15B 5.6 pF100B5R6BW500X;
C6A, C6B 6.8 pF 100B6R8JW500X; C7A, C7B 1.2 pF 100B1R2BW500X; C16 15 pF 100B150JW500X.
Murata
®
0805 size chip capacitor: C8A, C8B, C8C, C8D 0.01 µF GRM40X7R103K100AL.
Sprague
®
tantalum surface-mount chip capacitor: C2, C4, C10A, C10B, C11A, C11B 22 µF, T491, 35 V.
Johanson Giga-Trim
®
variable capacitor: C18 0.6 pF to 4.5 pF 27271SL.
B. Component Layout
Figure 2. AGR21125E Test Circuit
Agere Systems Inc.
3
AGR21125E
125 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET
Preliminary Data Sheet
April 2004
Typical Performance Characteristics
S
TOW
0.0
Ð
>
W
A
V
EL
E
N
GTH
170
0.49
f1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.0
Ð
D
L
OA
D
<
OW
A
R
7
±
180
HST
0.4
70
N
GT
-1
E
V
EL
WA
<Ð
-90
-160
RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)
1.2
1.4
1.6
1.8
2.0
3.0
4.0
5.0
10
20
50
0.2
0.49
0.48
)
/
Yo
(-jB
CE
0.6
-85
N
TA
EP
SC
4
0.0
50
-1
-80
U
ES
V
TI
UC
0.4
0.3
6
IN
D
-75
R
O
),
Zo
40
-1
-70
0.
0.6
-60
1.6
0.7
1.4
0.8
0.9
1.0
1.2
5
-5
0
-5
5
-4
MHz (f )
2110 (f1)
2140 (f2)
2170 (f3)
Z
L
Ω
Z
S
Ω
(Complex
Source Impedance) (Complex Optimum Load Impedance)
3.8 – j8.7
1.4 + j0.7
3.4 – j8.2
1.4 + j0.8
3.3 – j7.7
1.3 + j0.9
DRAIN (1)
Z
L
SOURCE (3)
GATE (2)
Z
S
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
4
Agere Systems Inc.
F
0.
32
18
0.
0
-5
-25
44
Z
S
0.2
06
0
-65
.5
0.
3
0.3
0.1
7
-30
-60
1.8
2.
0
0.3
0.1
4
6
-3
-70
5
0.35
0.15
0.36
0.14
-80
-4
0
0.37
0.13
0.4
-90
0.12
0.38
0.11
-100
0.39
CA
P
A
0.1
0.4
-110
CI
T
IVE
RE
AC
TA
NC
EC
OM
0.0
0.4
9
1
-12
0
0.0
8
PO
N
0.4
2
EN
T
(-j
4
0.
f3
5
0.4
f1
5
0.0
X/
5.0
1.
0.2
0
-10
8
0.
10
0.1
0.4
50
20
-15
4.0
-20
3.
0
1.
0
0.8
0.6
0.4
f3 Z
L
0.6
Z
0
= 10
Ω
A
RD
U
CT
0.48
IN
D
90
0.
8
10
0.25
0.26
0.24
0.27
0.23
0.25
0.24
0.26
0.23
0.27
REFL
ECTI
ON
COEFFI
CI
EN
T
I
N
D
EG
R
L
E
OF
EES
ANG
I
SSI
ON
COEFFI
CI
EN
T
I
N
TRA
N
SM
D
EGR
EES
L
E
OF
ANG
0.2
0.
07
-1
30
0.
43
0.1
20
50
-20
0.2
2
0.2
8
0.2
9
0.2
1
-30
0.2
0.3
-4
0
0.
19
0.
31
Preliminary Data Sheet
April 2004
AGR21125E
125 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics
(continued)
15.00
I
DQ
= 1600 mA
14.50
POWER GAIN (dB)
S
14.00
13.50
13.00
12.50
12.00
11.50
11.00
1
10
I
DQ
= 1400 mA
I
DQ
= 1200 mA
I
DQ
= 1000 mA
I
DQ
= 800 mA
V
DD
= 28 Vdc
f1 = 2135 MHz
f2 = 2145 MHz
TWO-TONE
MEASUREMENT
10 MHz TONE
SPACING
100
1000
OUTPUT POWER (W) PEP
Figure 4. Two-Tone Power Gain vs. Output Power and I
DQ
-20.00
-25.00
IMD3, THIRD ORDER (dBc)
s
-30.00
-35.00
-40.00
-45.00
-50.00
-55.00
-60.00
-65.00
-70.00
1
10
100
1000
OUTPUT POWER (W) PEP
I
DQ
= 1200 mA
I
DQ
= 1400 mA
I
DQ
= 800 mA
I
DQ
= 1000 mA
I
DQ
= 1600 mA
V
DD
= 28 Vdc
f1 = 2135 MHz
f2 = 2145 MHz
TWO-TONE
MEASUREMENT
10 MHz TONE
SPACING
Figure 5. IMD3 vs. Output Power and I
DQ
Agere Systems Inc.
5
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