EEWORLDEEWORLDEEWORLD

Part Number

Search

531RB34M0000DGR

Description
LVPECL Output Clock Oscillator, 34MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531RB34M0000DGR Overview

LVPECL Output Clock Oscillator, 34MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531RB34M0000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency34 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Part-time job - Embedded Linux + Android related product development
I have many years of experience in embedded Linux + Android development, many years of Linux driver and application development and Android driver and application development. I mainly develop gateway...
吃萝卜的猴子 Recruitment
Using micro libraries in MDK
Microlib is a subset of the standard library. Some infrequently used functions are not included in it. When using microlib, some functions cannot be used. As for MicroLib, do not use it lightly. Becau...
ye0217 Embedded System
使用 PIC12F675 A/D的問題
如下程式,時鐘用內帶的4M振蕩器,程序無法完成AD轉換,停留在 while(AD_DONE);#includestaticbit AD_DONE@((unsigned)ADCON0*8)+2; .........(其它定義)void main(void) {CMCON = 0x7;//關閉比較器,設定GP0,GP1,GP2為GPIO。TRISIO = 0xb;ANSEL = 0x51;ADCON0...
nuaajiang Microchip MCU
Is there a difference in the MBR storage location between a 1G SD card and a 2G SD card, or is there a difference in the timing of reading the SD card BLOCK cmd?
I am making a program to upgrade NK with SD card in the BOOT of my development platform, which needs to support 2G SD card. At present, my 1G card FAT16 card can read 0BLOCK 512 bytes to get MBR, and ...
回到当下 Embedded System
Questions about Connection Management
What is the essential purpose of the connection manager? The description on MSDN is too simple, so I doubt its necessity... Does a connection manager also need to be used to help connect when using a ...
wangjun01 Embedded System
VHDL keystroke problem
[i=s] This post was last edited by paulhyde on 2014-9-15 03:15 [/i] I am using FPGA chip to implement a dual-channel adjustable phase difference signal generator. The signal frequency range is adjusta...
那只叫冬菇的猫 Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2594  1680  79  2404  1406  53  34  2  49  29 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号