4.25 Gbps 40 × 40
数字交叉开关
ADN4605
产品特性
每端口的NRZ数据速率：DC至4.25
Gbps
可调节接收均衡
3 dB、6 dB或12 dB增强
4.25 Gbps时可补偿40英寸以上的FR4
可调节发射预加重/去加重
可编程增强和输出级
4.25 Gbps时可补偿40英寸以上的FR4
½功耗
每通道105
mW(2.5 V，400 mV p-p差分输出电平摆幅)
40 x 40、全差分、非阻塞式阵列
含双映射的双级连接编程
½抖动：典型值
<25 ps
灵活的电源范围(2.5
V至3.3 V)
直流耦合或交流耦合的差分PECL/CML输入
差分CML输出
按通道极性反½，便于路由
带禁用功½的50 片内I/O端接
支持8b10b加扰或无编码NRZ数据
串行(I
2
C从机或SPI)控制接口
并行控制接口
IP[39:0]
VTTIA,
VTTIB
IN[39:0]
Rx
40 × 40
SWITCH
MATRIX
功½框图
DV
CC
V
CC
Tx
PRE-
EMPHASIS
OP[39:0]
VTTOA,
VTTOB
ON[39:0]
EQ
EQUALIZATION
SETTINGS
CONNECTION
MAP 1
CONNECTION
MAP 0
OUTPUT
LEVEL
SETTINGS
PRE-
EMPHASIS
LEVEL
SETTINGS
V
EE
图1.
应用
数字视频(HDMI、DVI、DisplayPort、3G/HD/SD-SDI)
光½络交换
高速串行背板路由至OC-48(带FEC)
XAUI、4x光纤通道、无限带½®、背板千兆以太½
数据存储½
概述
ADN4605是一款与协议无关的40
× 40异步数字交叉开关，
拥有40路差分PECL/CML兼容输入和40路差分可编程CML
输出。
ADN4605针对NRZ信号进行了优化，每个端口的数据速率
最高达4.25
Gbps。各端口均提供可调输入均衡、可编程输
出摆幅和输出预加重/去加重。
ADN4605非阻塞式开关内核采用40
× 40纵横式结构，通过
串行和并行控制接口支持独立通道交换。ADN4605具有½
延时和极½的通道间歪斜。
采用I
2
C、SPI或并行接口与设备通信，以控制连接和其它
特性。
ADN4605采用35
mm × 35 mm、352 BGA封装，工½温度
范围为−40°C至+85°C。
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Speci cations subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
ADI中文版数据手册是英文版数据手册的译文，敬请谅解翻译中可½存在的语言组织或翻译错误，ADI不对翻译中存在的差异或由此产生的错误负责。如需确认任½词语的准确性，请参考ADI提供
的最新英文版数据手册。
09796-001
RESET
SER/PAR
I
2
C/SPI
(UPDATE)
CS
SCL/SCK/
WE
SDI/RE
DATA[0]/
SDA/SDO
PARALLEL/SERIA L CONTROL
LOGIC INTERFACE
DATA[1]
(UPDATE)
DATA[7:2]
ADDR[7:0]
ADN4605
ADN4605
目½
产品特性
........................................................................................... 1
功½框图
........................................................................................... 1
应用....................................................................................................
1
概述....................................................................................................
1
修订历史
........................................................................................... 2
技术规格
........................................................................................... 3
电气规格......................................................................................
3
I
2
C时序规格 ................................................................................ 5
SPI时序规格................................................................................ 5
并行模式规格
............................................................................. 6
绝对最大额定值..............................................................................
7
ESD警告....................................................................................... 7
引脚配½和功½描述
..................................................................... 8
典型性½参数
........................................................................... 18
工½原理....................................................................................
24
简介
............................................................................................ 24
接收器
........................................................................................ 25
极性反½....................................................................................
26
开关内核....................................................................................
27
复½
............................................................................................ 28
发射器
........................................................................................ 29
端接
............................................................................................ 32
I
2
C串行控制接口........................................................................... 33
I
2
C数据写入 .............................................................................. 33
I
2
C数据读取 .............................................................................. 34
SPI串行控制接口 .......................................................................... 35
并行控制接口
................................................................................ 38
地址输入：ADDR[7:0]
.......................................................... 38
数据输入/输出：DATA[7:0].................................................
38
写操½
........................................................................................ 38
读操½
............................................................................................. 38
寄存器映射.....................................................................................
39
应用信息
......................................................................................... 49
电源时序控制
........................................................................... 51
功耗
............................................................................................ 51
输出顺从电压
........................................................................... 51
TX/XPT
裕量
............................................................................ 51
印刷电路板(PCB)布局布线指南
.......................................... 54
外½尺寸
......................................................................................... 55
订购指南
......................................................................................... 55
修订历史
2011年11月—修订版0至修订版A
更改“印刷电路板(PCB)布局布线指南”...................................
54
删除图55；重新排序
................................................................... 54
2011年6月—修订版0：初始版
Rev. A | Page 2 of 56
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