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Datasheet> All Categories > Discrete semiconductor> The transistor> FQI11N40TU
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FQI11N40TU

Description
Power Field-Effect Transistor, 11.4A I(D), 400V, 0.48ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, I2PAK-3
CategoryDiscrete semiconductor    The transistor   
File Size565KB，9 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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FQI11N40TU Overview

Power Field-Effect Transistor, 11.4A I(D), 400V, 0.48ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, I2PAK-3

FQI11N40TU Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTO-262AA
package instructionI2PAK-3
Contacts3
Reach Compliance Codenot_compliant
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)520 mJ
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage400 V
Maximum drain current (Abs) (ID)11.4 A
Maximum drain current (ID)11.4 A
Maximum drain-source on-resistance0.48 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-262AA
JESD-30 codeR-PSIP-T3
JESD-609 codee3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT APPLICABLE
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)147 W
Maximum pulsed drain current (IDM)46 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT APPLICABLE
transistor applicationsSWITCHING
Transistor component materialsSILICON

FQI11N40TU Preview

FQB11N40 / FQI11N40
November 2001
FQB11N40 / FQI11N40
400V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply,
electronic lamp ballast based on half bridge.
Features
•
•
•
•
•
•
11.4A, 400V, R
DS(on)
= 0.48Ω @V
GS
= 10 V
Low gate charge ( typical 27 nC)
Low Crss ( typical 20 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
!
"
G
!
G
S
! "
"
"
D
2
-PAK
FQB Series
G D S
I
2
-PAK
FQI Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQB11N40 / FQI11N40
400
11.4
7.2
46
±
30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V
W
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
520
11.4
14.7
4.5
3.13
147
1.18
-55 to +150
300
T
J
, T
STG
T
L
Power Dissipation (T
C
= 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θJA
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
0.85
40
62.5
Units
°C/W
°C/W
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
FQB11N40 / FQI11N40
Electrical Characteristics
Symbol
Parameter
T
C
= 25°C unless otherwise noted
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
∆BV
DSS
/
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
GS
= 0 V, I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, T
C
= 125°C
V
GS
= 30 V, V
DS
= 0 V
V
GS
= -30 V, V
DS
= 0 V
400
--
--
--
--
--
--
0.42
--
--
--
--
--
--
1
10
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
DS
= V
GS
, I
D
= 250
µA
V
GS
= 10 V, I
D
= 5.7 A
V
DS
= 50 V, I
D
= 5.7 A
(Note 4)
3.0
--
--
--
0.38
7.6
5.0
0.48
--
V
Ω
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
--
--
1100
180
20
1400
240
30
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 320 V, I
D
= 11.4 A,
V
GS
= 10 V
(Note 4, 5)
(Note 4, 5)
V
DD
= 200 V, I
D
= 11.4 A,
R
G
= 25
Ω
--
--
--
--
--
--
--
30
100
60
60
27
7.3
12.3
70
210
130
130
35
--
--
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
V
GS
= 0 V, I
S
= 11.4 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0 V, I
S
= 11.4 A,
dI
F
/ dt = 100 A/µs
(Note 4)
--
--
--
--
--
--
--
--
240
1.8
11.4
46
1.5
--
--
A
A
V
ns
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 7mH, I
AS
= 11.4A, V
DD
= 50V, R
G
= 25
Ω,
Starting T
J
= 25°C
3. I
SD
≤
11.4A, di/dt
≤
200A/µs, V
DD
≤
BV
DSS,
Starting T
J
= 25°C
4. Pulse Test : Pulse width
≤
300µs, Duty cycle
≤
2%
5. Essentially independent of operating temperature
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
FQB11N40 / FQI11N40
Typical Characteristics
10
1
I
D
, Drain Current [A]
I
D
, Drain Current [A]
V
GS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Top :
10
1
150℃
25℃
0
10
0
10
-55℃
※
Notes :
1. 250μ s Pulse Test
2. T
C
= 25℃
※
Notes :
1. V
DS
= 40V
2. 250μ s Pulse Test
10
-1
10
-1
10
0
10
1
10
-1
2
4
6
8
10
V
DS
, Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.6
1.4
I
DR
, Reverse Drain Current [A]
R
DS(on)
[
Ω
],
Drain-Source On-Resistance
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
5
10
15
20
V
GS
= 10V
V
GS
= 20V
10
1
10
0
150℃
25℃
※
Note : T
J
= 25℃
※
Notes :
1. V
GS
= 0V
2. 250μ s Pulse Test
25
30
35
40
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
I
D
, Drain Current [A]
V
SD
, Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
2400
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
12
V
DS
= 80V
10
V
DS
= 200V
V
DS
= 320V
V
GS
, Gate-Source Voltage [V]
1800
Capacitance [pF]
C
iss
1200
8
C
oss
※
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
6
4
600
C
rss
2
※
Note : I
D
= 11.4 A
0
-1
10
0
10
0
10
1
0
5
10
15
20
25
30
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
FQB11N40 / FQI11N40
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV
DSS
, (Norm
alized)
Drain-Source Breakdown Voltage
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
※
Notes :
1. V
GS
= 10 V
2. I
D
= 5.7 A
0.9
※
Notes :
1. V
GS
= 0 V
2. I
D
= 250
μ
A
0.5
0.8
-100
-50
0
50
100
o
150
200
0.0
-100
-50
0
50
100
o
150
200
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
12
10
2
Operation in This Area
is Limited by R
DS(on)
100
µ
s
10
µ
s
9
I
D
, Drain Current [A]
10
1
1 ms
10 ms
DC
I
D
, Drain Current [A]
3
6
10
0
※
Notes :
1. T
C
= 25 C
2. T
J
= 150 C
3. Single Pulse
o
o
3
10
-1
10
0
10
1
10
2
10
0
25
50
75
100
125
150
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature [
℃
]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
( t) , T h e r m a l R e s p o n s e
10
0
D = 0 .5
※
N o te s :
1 . Z
θ
J C
( t) = 0 .8 5
℃
/ W M a x .
2 . D u ty F a c to r , D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
θ
J C
( t)
0 .2
10
-1
0 .1
0 .0 5
0 .0 2
0 .0 1
s i n g le p u ls e
P
DM
t
1
t
2
Z
θ
JC
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t
1
, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
FQB11N40 / FQI11N40
Gate Charge Test Circuit & Waveform
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
10V
Q
gs
Q
gd
V
GS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
V
DS
V
GS
R
G
R
L
V
DD
V
DS
90%
10V
DUT
V
GS
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Unclamped Inductive Switching Test Circuit & Waveforms
L
V
DS
I
D
R
G
DUT
t
p
BV
DSS
1
E
AS
= ---- L I
AS2
--------------------
2
BV
DSS
- V
DD
BV
DSS
I
AS
V
DD
V
DD
t
p
I
D
(t)
V
DS
(t)
Time
10V
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
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