83PN148DKILF datasheet, PDF - EEWORLD Datasheet

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83PN148DKILF: DescriptionVFQFPN-10, Tray; CategoryThe embedded processor and controller Microcontrollers and processors; File Size630KB，20 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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83PN148DKILF Overview

VFQFPN-10, Tray

83PN148DKILF Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	VFQFPN
package instruction	VFQFN-10
Contacts	10
Manufacturer packaging code	NRG10
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	R-XQCC-N10
JESD-609 code	e3
length	7 mm
Humidity sensitivity level	3
Number of terminals	10
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	148.5 MHz
Package body material	UNSPECIFIED
encapsulated code	HQCCN
Encapsulate equivalent code	LCC10,.2X.27,100/40
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
power supply	2.5/3.3 V
Master clock/crystal nominal frequency	27 MHz
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum slew rate	131 mA
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	1 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, VIDEO

83PN148DKILF Preview

Programmable FemtoClock

NG LVPECL

Oscillator Replacement

ICS83PN148I

DATA SHEET

General Description

The ICS83PN148I is a programmable LVPECL synthesizer that is

“forward” footprint compatible with standard 5mm x 7mm oscillators.

The device uses IDT’s fourth generation FemtoClock

technology for an optimum of high clock frequency and low phase

noise performance. Forward footprint compatibility means that a

board designed to accommodate the crystal oscillator interface and

the optional control pins is also fully compatible with a canned

oscillator footprint - the canned oscillator will drop onto the

10-VFQFN footprint for second sourcing purposes. This capability

provides designers with programability and lead time advantages of

silicon/crystal based solutions while maintaining compatibility with

industry standard 5mm x 7mm oscillator footprints for ease of supply

chain management. Oscillator-level performance is maintained with

IDT’s 4

Generation FemtoClock

NG PLL technology, which

delivers sub 0.5ps rms phase jitter.

The ICS83PN148I defaults to 148.5MHz using a 27MHz crystal with

2 programming pins floating (pulled down/pulled up with internal

pullup or pulldown resistors) but can also be set to 4 different

frequency multiplier settings to support a wide variety of

applications. The below table shows some of the more common

application settings.

Features

•

Fourth Generation FemtoClock

Next Generation (NG)

technology

Footprint compatible with 5mm x 7mm differential oscillators

One differential LVPECL output pair

Crystal oscillator interface can also be overdriven by a

single-ended reference clock

Output frequency range: 54MHz –148.5MHz

Crystal/input frequency: 27MHz, parallel resonant crystal

VCO range: 2GHz – 2.5GHz

Cycle-to-cycle jitter: 10ps (maximum), 3.3V±5%

RMS phase jitter @ 148.5MHz, 12kHz – 20MHz:

0.332ps (typical)

Full 3.3V or 2.5V operating supply

-40°C to 85°C ambient operating temperature

Available in lead-free (RoHS 6) package

Common Applications and Settings

FSEL[1:0]

11 (default)

XTAL (MHz)

Output Frequency

(MHz)

67.5

74.25

148.5

Application(s)

HD-SDI Video

HD Video

N x 27MHz

HD-SDI Video

Pin Assignment

FSEL 0

FSE L1

RESERVED

Block Diagram

Pullup

XTAL_OUT

XTAL_IN

OSC

XTAL_OUT

PFD

LPF

FemtoClock® NG

VCO

2 - 2.5GHz

÷N

ICS83PN148I

10-Lead VFQFN

5mm x 7mm x 1mm package body

K Package

Top View

÷M

Pullup

FSEL0

FSEL1

Control

Logic

ICS83PN148DKI REVISION A OCTOBER 11, 2012

XTAL_IN

ICS83PN148I Data Sheet

PROGRAMMABLE FEMTOCLOCK® NG LVPECL OSCILLATOR REPLACEMENT

Table 1. Pin Descriptions

Number

6, 7

Name

RESERVED

XTAL_OUT

XTAL_IN

Q, nQ

FSEL0

FSEL1

Power

Input

Output

Power

Input

Pullup

Input

Type

Pullup

Description

Output enable. LVCMOS/LVTTL interface levels.

Reserved pin. Do not connect.

Negative supply pin.

Crystal oscillator interface XTAL_IN is the input, XTAL_OUT is the output. This

oscillator interface can also be driven by a single-ended reference clock.

Differential output pair. LVPECL interface levels.

Power supply pin.

Output divider control input. Sets the output divider value to one of four values.

See Table 3. LVCMOS/LVTTL interface levels.

Output divider control input. Sets the output divider value to one of four values.

See Table 3. LVCMOS/LVTTL interface levels

NOTE:

Pullup

refers to internal input resistors. See Table 2,

Pin Characteristics,

for typical values.

Table 2. Pin Characteristics

Symbol

PULLUP

Parameter

Input Capacitance

Input Pullup Resistor

Test Conditions

Minimum

Typical

Maximum

Units



Function Table

Table 3. Divider Function Table

FSEL[1:0]

1 1 (default)

M Value

÷80

÷88

÷76

÷88

N Value

÷32

÷38

÷16

ICS83PN148DKI REVISION A OCTOBER 11, 2012

ICS83PN148I Data Sheet

PROGRAMMABLE FEMTOCLOCK® NG LVPECL OSCILLATOR REPLACEMENT

Absolute Maximum Ratings

NOTE: Stresses beyond those listed under

Absolute Maximum Ratings

may cause permanent damage to the device.

These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond

those listed in the

DC Characteristics or AC Characteristics

is not implied. Exposure to absolute maximum rating conditions for

extended periods may affect product reliability.

Item

Supply Voltage, V

Inputs, V

XTAL_IN

Other Inputs

Outputs, I

Continuos Current

Surge Current

Package Thermal Impedance,



Storage Temperature, T

STG

Rating

3.63V

0V to 2V

-0.5V to V

+ 0.5V

50mA

100mA

39.2C/W (0 mps)

-65C to 150C

DC Electrical Characteristics

Table 4A. Power Supply DC Characteristics,

= 3.3V ± 5%, V

= 0V, T

= -40°C to 85°C

Symbol

Parameter

Power Supply Voltage

Power Supply Current

Test Conditions

Minimum

3.135

Typical

3.3

Maximum

3.465

131

Units

Table 4B. Power Supply DC Characteristics,

= 2.5V ± 5%, V

= 0V, T

= -40°C to 85°C

Symbol

Parameter

Power Supply Voltage

Power Supply Current

Test Conditions

Minimum

2.375

Typical

2.5

Maximum

2.625

124

Units

Table 4C. LVCMOS/LVTTL DC Characteristics,

= 3.3V ± 5% or 2.5V ± 5%, V

= 0V, T

= -40°C to 85°C

Symbol

Parameter

Input High Voltage

Test Conditions

= 3.465V

= 2.625V

Input Low Voltage

Input High

Current

Input Low

Current

OE,

FSEL[1:0]

OE,

FSEL[1:0]

= 3.465V

= 2.625V

= V

= 3.465V or 2.625V

= 3.465V or 2.625V, V

= 0V

-150

Minimum

1.7

-0.3

Typical

Maximum

+ 0.3

0.8

0.7

Units

µA

ICS83PN148DKI REVISION A OCTOBER 11, 2012

ICS83PN148I Data Sheet

PROGRAMMABLE FEMTOCLOCK® NG LVPECL OSCILLATOR REPLACEMENT

Table 4D. LVPECL DC Characteristics,

= 3.3V ± 5% or 2.5V ± 5%, , V

= 0V, T

= -40°C to 85°C

Symbol

SWING

Parameter

Output High Voltage; NOTE 1

Output Low Voltage; NOTE 1

Peak-to-Peak Output Voltage Swing

Test Conditions

Minimum

– 1.3

– 2.0

0.6

Typical

Maximum

– 0.8

– 1.6

1.0

Units

NOTE 1: Outputs termination with 50 to V

– 2V.

Table 5. Crystal Characteristics

Parameter

Mode of Oscillation

Frequency

Equivalent Series Resistance (ESR)

Shunt Capacitance

Test Conditions

Minimum

Typical

Fundamental

MHz

Maximum

Units



ICS83PN148DKI REVISION A OCTOBER 11, 2012

ICS83PN148I Data Sheet

PROGRAMMABLE FEMTOCLOCK® NG LVPECL OSCILLATOR REPLACEMENT

AC Electrical Characteristics

Table 6A. AC Characteristics,

= 3.3V ± 5%, V

= 0V, T

= -40°C to 85°C

Symbol

MAX

Parameter

Output Frequency

67.5MHz,

Integration Range: 12kHz – 20MHz

RMS Phase Jitter (Random);

NOTE 1

74.25MHz,

Integration Range: 12kHz – 20MHz

54MHz,

Integration Range: 12kHz – 20MHz

148.5MHz,

Integration Range: 12kHz – 20MHz

tjit(cc)

/ t

odc

Cycle-to-Cycle Jitter; NOTE 2

Output Rise/Fall Time

Output Duty Cycle

20% to 80%

100

Test Conditions

Minimum

0.332

0.344

0.341

0.326

Typical

Maximum

148.5

0.5

350

Units

MHz

tjit(Ø)

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: Please refer to the Phase Noise plots.

NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.

Table 6B. AC Characteristics,

= 2.5V ± 5%, V

= 0V, T

= -40°C to 85°C

Symbol

MAX

Parameter

Output Frequency

67.5MHz,

Integration Range: 12kHz – 20MHz

RMS Phase Jitter (Random);

NOTE 1

74.25MHz,

Integration Range: 12kHz – 20MHz

54MHz,

Integration Range: 12kHz – 20MHz

148.5MHz,

Integration Range: 12kHz – 20MHz

tjit(cc)

/ t

odc

Cycle-to-Cycle Jitter; NOTE 2

Output Rise/Fall Time

Output Duty Cycle

20% to 80%

100

Test Conditions

Minimum

0.335

0.347

0.341

0.326

Typical

Maximum

148.5

0.5

350

Units

MHz

tjit(Ø)

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: Please refer to the Phase Noise plots.

NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.

ICS83PN148DKI REVISION A OCTOBER 11, 2012

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83PN148DKILF Related Products

	83PN148DKILF	83PN148DKILFT
Description	VFQFPN-10, Tray	VFQFPN-10, Reel
Brand Name	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	VFQFPN	VFQFPN
package instruction	VFQFN-10	VFQFN-10
Contacts	10	10
Manufacturer packaging code	NRG10	NRG10
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
JESD-30 code	R-XQCC-N10	R-XQCC-N10
JESD-609 code	e3	e3
length	7 mm	7 mm
Humidity sensitivity level	3	3
Number of terminals	10	10
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Maximum output clock frequency	148.5 MHz	148.5 MHz
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HQCCN	HQCCN
Encapsulate equivalent code	LCC10,.2X.27,100/40	LCC10,.2X.27,100/40
Package shape	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260	260
power supply	2.5/3.3 V	2.5/3.3 V
Master clock/crystal nominal frequency	27 MHz	27 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm
Maximum slew rate	131 mA	131 mA
Maximum supply voltage	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	NO LEAD	NO LEAD
Terminal pitch	1 mm	1 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	5 mm	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, VIDEO	CLOCK GENERATOR, VIDEO

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