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843204AGIT

Description
Clock Generator, 156.25MHz, PDSO48, 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size366KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

843204AGIT Overview

Clock Generator, 156.25MHz, PDSO48, 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48

843204AGIT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instruction6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48
Contacts48
Reach Compliance Codenot_compliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length12.5 mm
Humidity sensitivity level1
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency156.25 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP48,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum slew rate170 mA
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width6.1 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
FEMTOCLOCK™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
ICS843204I
G
ENERAL
D
ESCRIPTION
The ICS843204I is a 4 output LVPECL Synthesizer
optimized to generate Gigabit Ethernet and SONET
HiPerClockS™
reference clock frequencies and is a member of the
HiPerClocks
TM
family of high performance clock
solutions from IDT. Using a 19.44MHz and 25MHz,
18pF parallel resonant crystal, 155.52MHz and 156.25MHz
frequencies can be generated. The ICS843204I uses IDT’s
FemtoClock
TM
low phase noise VCO technology and can achieve
1ps or lower typical RMS phase jitter. The ICS843204I is pack-
aged in a 48-pin TSSOP package.
F
EATURES
• Four 3.3V LVPECL outputs
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Supports the following output frequencies: 155.52MHz
and 156.25MHz
• VCO range: 560MHz - 680MHz
• RMS phase jitter @ 155.52MHz, using a 19.44MHz crystal
(12kHz - 20MHz): 0.98ps (typical)
• RMS phase jitter @ 156.25MHz, using a 19.44MHz crystal
(1.875MHz - 20MHz): 0.52ps (typical)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
B
LOCK
D
IAGRAM
nPLL_BYPASS_A
Pullup
IN_SELA
Pullup
CLK0
Pulldown
25MHz
P
IN
A
SSIGNMENT
nQA1
QA1
nQA0
QA0
nc
V
CCO
_
A
SELA1
SELA0
nPLL_BYPASS_A
nc
nc
nc
nc
XTAL_IN1
XTAL_OUT1
CLK1
IN_SEL_B
nPLL_BYPASS_B
V
CCO
_
B
nc
QB0
nQB0
QB1
nQB1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
IN_SEL_A
CLK0
XTAL_IN0
XTAL_OUT0
nc
V
EE
OEA0
OEA1
V
CC
V
CCA
_
A
nc
nc
SELB0
V
EE
OEB0
OEB1
V
CC
SELB1
V
CCA
_
B
nc
nc
nc
nc
nc
SELA0
OEA0
QA0
XTAL_IN0
OSC
XTAL_OUT0
PLL
÷4
156.25MHz
0
1
SELA1
OEA1
QA1
nQA1
nQA0
625MHz
0
1
nPLL_BYPASS_B
Pullup
IN_SELB
Pullup
CLK1
Pulldown
19.44MHz
SELB0
OEB0
QB0
nQB0
XTAL_IN1
0
OSC
XTAL_OUT1
PLL
622.08MHz
÷4
155.52MHz
1
SELB0
OEB1
ICS843204I
QB1
nQB1
0
1
48 Lead TSSOP
6.1mm x 12.5mm x 0.925mm
package body
G Package
Top View
IDT
/ ICS
3.3V LVPECL FREQUENCY SYNTHESIZER
1
ICS843204AGI REV. A MARCH 18, 2009

843204AGIT Related Products

843204AGIT 843204AGI
Description Clock Generator, 156.25MHz, PDSO48, 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48 Clock Generator, 156.25MHz, PDSO48, 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP TSSOP
package instruction 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48 6.10 X 12.50 MM, 0.925 MM HEIGHT, MO-153, TSSOP-48
Contacts 48 48
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
JESD-30 code R-PDSO-G48 R-PDSO-G48
JESD-609 code e0 e0
length 12.5 mm 12.5 mm
Humidity sensitivity level 1 1
Number of terminals 48 48
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 156.25 MHz 156.25 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Encapsulate equivalent code TSSOP48,.3,20 TSSOP48,.3,20
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
power supply 3.3 V 3.3 V
Master clock/crystal nominal frequency 25 MHz 25 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm
Maximum slew rate 170 mA 170 mA
Maximum supply voltage 3.63 V 3.63 V
Minimum supply voltage 2.97 V 2.97 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.5 mm 0.5 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 6.1 mm 6.1 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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