SAF-XC878M-13FFI5V datasheet, PDF

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SAF-XC878M-13FFI5V: Description8-Bit Single-Chip Microcontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，146 Pages; ManufacturerInfineon; Websitehttp://www.infineon.com/

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SAF-XC878M-13FFI5V Overview

8-Bit Single-Chip Microcontroller

SAF-XC878M-13FFI5V Parametric

Parameter Name	Attribute value
Parts packaging code	QFP
package instruction	GREEN, PLASTIC, LQFP-64
Contacts	64
Reach Compliance Code	compli
Has ADC	YES
Other features	ALSO OPERATES AT 5 V I/O SUPPLY
Address bus width
bit size	8
maximum clock frequency	20 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G64
length	10 mm
Number of I/O lines	40
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	24 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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8-Bit

XC87xCLM

8-Bit Single-Chip Microcontroller

Data Sheet

V1.5 2011-03

Mic r o co n tr o ll e r s

XC87xCLM

Table of Contents

2.1

2.2

2.3

2.4

3.1

3.2

3.2.1

3.2.1.1

3.2.2

3.2.2.1

3.2.2.2

3.2.3

3.2.3.1

3.2.4

3.2.4.1

3.2.4.2

3.2.4.3

3.2.4.4

3.2.4.5

3.2.4.6

3.2.4.7

3.2.4.8

3.2.4.9

3.2.4.10

3.2.4.11

3.2.4.12

3.2.4.13

3.2.4.14

3.2.4.15

3.3

3.3.1

3.4

3.4.1

3.4.2

3.4.3

3.5

3.6

Summary of Features

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General Device Information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Functional Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Processor Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Memory Protection Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Flash Memory Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Special Function Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Address Extension by Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Address Extension by Paging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Bit Protection Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Password Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

XC87x Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MDU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CORDIC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

System Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

WDT Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Port Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ADC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer 2 Compare/Capture Unit Registers . . . . . . . . . . . . . . . . . . . . .

Timer 21 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CCU6 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UART1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SSC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MultiCAN Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OCDS Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Flash Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Flash Bank Pagination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Source and Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parallel Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Supply System with Embedded Voltage Regulator . . . . . . . . . . . .

I-1

Data Sheet

V1.5, 2011-03

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