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LMX2306/LMX2316/LMX2326 PLLatinum Low Power Frequency Synthesizer for RF Personal
Communications
March 2004
LMX2306/LMX2316/LMX2326
PLLatinum
™
Low Power Frequency Synthesizer for RF
Personal Communications
LMX2306
550 MHz
LMX2316
1.2 GHz
LMX2326
2.8 GHz
General Description
The LMX2306/16/26 are monolithic, integrated frequency
synthesizers with prescalers that are designed to be used to
generate a very stable low noise signal for controlling the
local oscillator of an RF transceiver. They are fabricated
using National’s ABiC V silicon BiCMOS 0.5µ process.
The LMX2306 contains a 8/9 dual modulus prescaler while
the LMX2316 and the LMX2326 have a 32/33 dual modulus
prescaler. The LMX2306/16/26 employ a digital phase
locked loop technique. When combined with a high quality
reference oscillator and loop filter, the LMX2306/16/26 pro-
vide the feedback tuning voltage for a voltage controlled
oscillator to generate a low phase noise local oscillator sig-
nal. Serial data is transferred into the LMX2306/16/26 via a
three wire interface (Data, Enable, Clock). Supply voltage
can range from 2.3V to 5.5V. The LMX2306/16/26 feature
ultra low current consumption; LMX2306 - 1.7 mA at 3V,
LMX2316 - 2.5 mA at 3V, and LMX2326 - 4.7 mA at 3V.
The LMX2306/16/26 synthesizers are available in a 16-pin
TSSOP surface mount plastic package.
Features
n
n
n
n
n
2.3V to 5.5V operation
Ultra low current consumption
2.5V V
CC
JEDEC standard compatible
Programmable or logical power down mode:
— I
CC
= 1 µA typical at 3V
Dual modulus prescaler:
— LMX2306
8/9
— LMX2316/26
32/33
Selectable charge pump TRI-STATE
®
mode
Selectable FastLock
™
mode with timeout counter
MICROWIRE
™
Interface
Digital Lock Detect
n
n
n
n
Applications
n
n
n
n
n
Portable wireless communications (PCS/PCN, cordless)
Wireless Local Area Networks (WLANs)
Cable TV tuners (CATV)
Pagers
Other wireless communication systems
Functional Block Diagram
10012701
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
FastLock
™
, PLLatinum
™
and MICROWIRE
™
are trademarks of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS100127
www.national.com
LMX2306/LMX2316/LMX2326
Connection Diagrams
LMX2306/16/26
LMX2306/16/26
10012719
10012702
16-Lead (0.173” Wide) Thin Shrink Small Outline
Package(TM)
Order Number LMX2306TM, LMX2306TMX, LMX2316TM,
LMX2316TMX,
LMX2326TM or LMX2326TMX
See NS Package Number MTC16
16-pin Chip Scale Package
Order Number LMX2306SLBX, LMX2316SLBX or
LM2326SLBX
See NS Package Number SLB16A
Pin Descriptions
16-Pin 16-Pin
TSSOP CSP
1
2
3
4
5
15
16
1
2
3
Pin
Name
FL
o
CP
o
GND
GND
f
IN
I
I/O
Description
O FastLock Output. For connection of parallel resistor to the loop filter. (See Section 1.3.4 FASTLOCK
MODES description.)
O Charge Pump Output. For connection to a loop filter for driving the input of an external VCO.
Charge Pump Ground.
Analog Ground.
RF Prescaler Complementary Input. A bypass capacitor should be placed as close as possible to
this pin and be connected directly to the ground plane. The complementary input can be left
unbypassed, with some degradation in RF sensitivity.
RF Prescaler Input. Small signal input from the VCO.
Analog Power Supply Voltage Input. Input may range from 2.3V to 5.5V. Bypass capacitors should
be placed as close as possible to this pin and be connected directly to the ground plane. V
CC1
must
equal V
CC2
.
I
Oscillator Input. This input is a CMOS input with a threshold of approximately V
CC
/2 and an
equivalent 100k input resistance. The oscillator input is driven from a reference oscillator.
Digital Ground.
I
Chip Enable. A LOW on CE powers down the device and will TRI-STATE the charge pump output.
Taking CE HIGH will power up the device depending on the status of the power down bit F2. (See
Section 1.3.1 POWERDOWN OPERATION and Section 2.1 DEVICE PROGRAMMING AFTER
FIRST APPLYING V
CC
.)
High Impedance CMOS Clock Input. Data for the various counters is clocked in on the rising edge
into the 21-bit shift register.
Binary Serial Data Input. Data entered MSB first. The last two bits are the control bits. High
impedance CMOS input.
Load Enable CMOS Input. When LE goes HIGH, data stored in the shift registers is loaded into one
of the 3 appropriate latches (control bit dependent).
6
7
4
5
f
IN
V
CC1
I
8
9
10
6
7
8
OSC
IN
GND
CE
11
12
13
14
15
9
10
11
12
13
Clock
Data
LE
Fo/LD
V
CC2
I
I
I
O Multiplexed Output of the RF Programmable or Reference Dividers and Lock Detect. CMOS output.
(See
Table 4.)
Digital Power Supply Voltage Input. Input may range from 2.3V to 5.5V. Bypass capacitors should be
placed as close as possible to this pin and be connected directly to the ground plane. V
CC1
must
equal V
CC2
.
Power Supply for Charge Pump. Must be
≥
V
CC
.
16
14
V
P
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2
LMX2306/LMX2316/LMX2326
Absolute Maximum Ratings
(Notes 1, 2)
Power Supply Voltage
V
CC1
V
CC2
V
p
Voltage on Any Pin
with GND = 0V (V
I
)
Storage Temperature Range (T
S
)
Lead Temperature (T
L
)
(solder, 4 sec.)
−0.3V to V
CC
+
0.3V
−65˚C to +150˚C
+260˚C
−0.3V to +6.5V
−0.3V to +6.5V
−0.3V to +6.5V
Recommended Operating
Conditions
Min
Power Supply Voltage
V
CC1
V
CC2
V
p
Operating Temperature (T
A
)
2.3
V
CC1
V
CC
−40
5.5
V
CC1
5.5
+85
V
V
V
˚C
Max
Units
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Recommended operating conditions indicate condi-
tions for which the device is intended to be functional, but do not guarantee
specific performance limits. For guaranteed specifications and test condi-
tions, see the Electrical Characteristics. The guaranteed specifications apply
only for the test conditions listed.
Note 2:
This device is a high performance RF integrated circuit with an ESD
rating
<
2 kV and is ESD sensitive. Handling and assembly of this device
should only be done at ESD protected work stations.
Electrical Characteristics
V
CC
= 3.0V, V
p
= 3.0V; −40˚C
<
T
A
<
85˚C except as specified
Symbol
I
CC
Parameter
Power Supply Current
LMX2306
LMX2316
LMX2326
I
CC-PWDN
f
IN
Powerdown Current
RF Input Operating
Frequency
LMX2306
LMX2316
LMX2326
f
osc
fφ
Pf
IN
OSC
IN
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
ICP
o-source
ICP
o-sink
ICP
o-source
ICP
o-sink
ICP
o-Tri
Charge Pump TRI-STATE Current
Maximum Oscillator Frequency
Maximum Phase Detector Frequency
RF Input Sensitivity
Oscillator Sensitivity
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Oscillator Input Current
Oscillator Input Current
Charge Pump Output Current
(Note 4)
(Note 4)
V
IH
= V
CC
= 5.5V (Note 4)
V
IL
= 0V, V
CC
= 5.5V
(Note 4)
V
IH
= V
CC
= 5.5V
V
IL
= 0V, V
CC
= 5.5V
V
Do
= V
p
/2, ICP
o
= LOW
(Note 3)
V
Do
= V
p
/2, ICP
o
= LOW
(Note 3)
V
Do
= V
p
/2, ICP
o
= HIGH
(Note 3)
V
CPo
= V
p
/2, ICP
o
= HIGH
(Note 3)
0.5
≤
V
CPo
≤
V
p
− 0.5
−40˚C
<
T
A
<
85˚C
−2.5
−100
−250
250
−1.0
1.0
2.5
−1.0
−1.0
V
CC
= 2.3V to
<
3.0V
V
CC
= 3.0V to 5.5V
−15
−10
−5
0.8 x V
CC
0.2 x
V
CC
1.0
1.0
100
Conditions
Min
V
CC
= 2.3V to 5.5 V
V
CC
= 2.3V to 5.5V
V
CC
= 2.3V to 5.5V
V
CC
= 3.0V
V
CC
= 2.3V to 5.5V
V
CC
= 2.3V to 5.5V
V
CC
= 2.3V to 5.5V
V
CC
= 3.0V to 5.5V
V
CC
= 2.3V to 5.5V
V
CC
= 2.7V to 5.5V
25
0.1
0.1
0.1
5
5
Values
Typ
1.7
2.5
4.7
1
550
1.2
2.1
2.8
40
100
10
+0
+0
Max
3.5
5.0
7.0
mA
mA
mA
µA
MHz
GHz
GHz
GHz
MHz
MHz
MHz
dBm
dBm
dBm
V
V
µA
µA
µA
µA
µA
µA
mA
mA
nA
Units
3
www.national.com
LMX2306/LMX2316/LMX2326
Electrical Characteristics
V
CC
Symbol
ICP
o-sink vs
ICP
o-source
ICP
o
vs V
Do
ICP
o
vs T
V
OH
V
OL
t
CS
t
CH
t
CWH
t
CWL
t
ES
t
EW
CP Current vs Voltage
CP Current vs Temperature
High-Level Output Voltage
Low-Level Output Voltage
Data to Clock Set Up Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Parameter
(Continued)
= 3.0V, V
p
= 3.0V; −40˚C
<
T
A
<
85˚C except as specified
Conditions
Min
CP Sink vs Source Mismatch
V
CPo
= V
p
/2
T
A
= 25˚C
0.5
≤
V
CPo
≤
V
p
− 0.5
T
A
= 25˚C
V
CPo
= V
p
/2
−40˚C
<
T
A
<
85˚C
I
OH
= −500 µA
I
OL
= 500 µA
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
50
10
50
50
50
50
V
CC
− 0.4
0.4
V
V
ns
ns
ns
ns
ns
ns
5
%
5
%
Values
Typ
5
Max
%
Units
Clock to Load Enable Set Up Time
Load Enable Pulse Width
Note 3:
See PROGRAMMABLE MODES for ICP
o
description
Note 4:
Except f
IN
and OSC
IN
.
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4
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