EEWORLDEEWORLDEEWORLD

Part Number

Search

54122-810-68-0950R

Description
Board Connector, 136 Contact(s), 2 Row(s), Male, Straight, 0.1 inch Pitch, Solder Kinked Leads Terminal, Locking, Black Insulator, Receptacle
CategoryThe connector    The connector   
File Size107KB,1 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Download Datasheet Parametric View All

54122-810-68-0950R Overview

Board Connector, 136 Contact(s), 2 Row(s), Male, Straight, 0.1 inch Pitch, Solder Kinked Leads Terminal, Locking, Black Insulator, Receptacle

54122-810-68-0950R Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAmphenol
Reach Compliance Codecompliant
body width0.19 inch
subject depth0.374 inch
body length6.8 inch
Body/casing typeRECEPTACLE
Connector typeBOARD CONNECTOR
Contact to complete cooperationAU ON NI
Contact completed and terminatedTin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
contact modeRECTANGULAR
Contact styleSQ PIN-SKT
Insulation resistance5000000000 Ω
Insulator colorBLACK
insulator materialTHERMOPLASTIC
JESD-609 codee0
Manufacturer's serial number54122
Plug contact pitch0.1 inch
Match contact row spacing0.1 inch
Installation option 1LOCKING
Installation methodSTRAIGHT
Installation typeBOARD
Number of connectorsONE
PCB row number2
Number of rows loaded2
Maximum operating temperature125 °C
Minimum operating temperature-65 °C
PCB contact patternRECTANGULAR
PCB contact row spacing2.54 mm
Plating thickness15u inch
Rated current (signal)3 A
GuidelineUL, CSA
reliabilityCOMMERCIAL
Terminal length0.12 inch
Terminal pitch2.54 mm
Termination typeSOLDER KINKED LEADS
Total number of contacts136
PDM: Rev:K
STATUS:
Released
Printed: Mar 10, 2011
.
STM32 Network SMI Interface
1Introduction to Ethernet The Ethernet peripheral of STM32F20X and STM32F21 can receive and send data according to the IEEE802.3-2002 standard.Ethernet provides a complete and flexible peripheral to m...
嵌入式enjoy stm32/stm8
A method to avoid latches in Verilog
To avoid latches, you can pre-assign unconditional default values to variables in an ALWAYS block, as follows: This is a relatively simple way to avoid latches. I personally think that even if the def...
eeleader FPGA/CPLD
Cyclone3 I/O logic level compatibility issue
I use FPGA's 3, 4, 5, 6 banks to connect to DDR1 interface. DDR's I/O voltage is 2.5V, but I connected the VCCIO of these banks of FPGA to 3.3V. What impact will this have on the subsequent circuit de...
happysheep224 FPGA/CPLD
CC3200-LAUNCHXL Development Board
The development board has complete documentation and is easy to use. I used IAR7.2.0 + cc3200sdk-1.3.0-windows-installer.exe + CC3x00ServicePack-1.0.1.13-2.11.0.1-windows-installer.exe to build the pl...
Jacktang Wireless Connectivity
PCB Library
I need to change the PCB component package of someone else's LAY board. I have done the component package in the library, but I can't see the drawn component package when I modify the PCB. I am a novi...
星空198711 PCB Design
IAR program download
[i=s]This post was last edited by Mai Shou on 2014-5-21 22:33[/i] [img]C:\Users\Administrator\Desktop[/img] [img]C:\Users\Administrator\Desktop[/img] The connection has been confirmed...
麦收 Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 766  2521  2306  215  2391  16  51  47  5  49 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号