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BUK9K6R2-40E,115

Description
Dual N-channel TrenchMOS logic level FET
File Size293KB,13 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet View All

BUK9K6R2-40E,115 Overview

Dual N-channel TrenchMOS logic level FET

LF
BUK9K6R2-40E
21 February 2013
PA
K
56D
Dual N-channel TrenchMOS logic level FET
Product data sheet
1. General description
Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS
technology. This product has been designed and qualified to AEC Q101 standard for use
in high performance automotive applications.
2. Features and benefits
Q101 compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True logic level gate with V
GS(th)
> 0.5 V @ 175 °C
3. Applications
12 V Automotive systems
Motors, lamps and solenoid control
Start-stop micro-hybrid applications
Transmission control
Ultra high performance power switching
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 5 V; T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C;
Fig. 2
V
GS
= 5 V; I
D
= 20 A; T
j
= 25 °C;
Fig. 12
Min
-
-
-
Typ
-
-
-
Max
40
40
68
Unit
V
A
W
Static characteristics FET1 and FET2
drain-source on-state
resistance
gate-drain charge
-
5.27
6.2
Dynamic characteristics FET1 and FET2
Q
GD
I
D
= 10 A; V
DS
= 32 V; V
GS
= 10 V;
T
j
= 25 °C;
Fig. 14; Fig. 15
-
5.8
-
nC
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