PUMD48,115 datasheet, PDF - EEWORLD Datasheet

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PUMD48,115: Description100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR; CategoryDiscrete semiconductor The transistor; File Size931KB，16 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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PUMD48,115 Overview

100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR

PUMD48,115 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	TSSOP
package instruction	PLASTIC, SC-88, 6 PIN
Contacts	6
Manufacturer packaging code	SOT363
Reach Compliance Code	compli
ECCN code	EAR99
Other features	BUILT-IN BIAS RESISTOR RATIO IS 1
Maximum collector current (IC)	0.1 A
Collector-emitter maximum voltage	50 V
Configuration	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)	80
JESD-30 code	R-PDSO-G6
JESD-609 code	e3
Humidity sensitivity level	1
Number of components	2
Number of terminals	6
Maximum operating temperature	150 °C
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Polarity/channel type	NPN AND PNP
Maximum power dissipation(Abs)	0.3 W
Certification status	Not Qualified
surface mount	YES
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal location	DUAL
Maximum time at peak reflow temperature	40
transistor applications	SWITCHING
Transistor component materials	SILICON

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PEMD48; PUMD48

NPN/PNP resistor-equipped transistors;

R1 = 47 k, R2 = 47 k and R1 = 2.2 k, R2 = 47 k

Rev. 6 — 24 January 2012

Product data sheet

1. Product profile

1.1 General description

NPN/PNP double Resistor-Equipped Transistors (RET) in small Surface-Mounted

Device (SMD) plastic packages.

Table 1.

Product overview

Package

NXP

PEMD48

PUMD48

SOT666

SOT363

JEITA

SC-88

Package

configuration

ultra small and flat lead

very small

Type number

1.2 Features and benefits



100 mA output current capability



Built-in bias resistors



Simplifies circuit design



Reduces component count



Reduces pick and place costs



AEC-Q101 qualified

1.3 Applications



Low current peripheral driver



Control of IC inputs



Replaces general-purpose transistors in digital applications

1.4 Quick reference data

Table 2.

Symbol

CEO

R2/R1

Quick reference data

Parameter

collector-emitter voltage

output current

bias resistor 1 (input)

bias resistor ratio

bias resistor 1 (input)

bias resistor ratio

Conditions

open base

Min

0.8

1.54

Typ

1.0

2.20

Max

100

1.2

2.86

k

Unit

k

Per transistor; for the PNP transistor with negative polarity

Transistor TR1 (NPN)

Transistor TR2 (PNP)

PUMD48,115 Related Products

	PUMD48,115	PEMD48,115	PUMD48,125	PUMD48,165
Description	100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR	100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR	100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR	100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP
Parts packaging code	TSSOP	SOT	TSSOP	TSSOP
Contacts	6	6	6	6
Manufacturer packaging code	SOT363	SOT666	SOT363	SOT363
Reach Compliance Code	compli	compli	compli	compli
Minimum DC current gain (hFE)	80	80	80	80
JESD-609 code	e3	e3	e3	e3
Humidity sensitivity level	1	1	1	1
Number of components	2	2	2	2
Polarity/channel type	NPN AND PNP	NPN AND PNP	NPN/PNP	NPN AND PNP
Maximum power dissipation(Abs)	0.3 W	0.3 W	0.3 W	0.3 W
surface mount	YES	YES	YES	YES
Terminal surface	Tin (Sn)	Tin (Sn)	Tin (Sn)	Tin (Sn)
Transistor component materials	SILICON	SILICON	SILICON	SILICON
package instruction	PLASTIC, SC-88, 6 PIN	PLASTIC PACKAGE-6	-	PLASTIC, SC-88, 6 PIN
ECCN code	EAR99	EAR99	-	EAR99
Other features	BUILT-IN BIAS RESISTOR RATIO IS 1	BUILT-IN BIAS RESISTOR RATIO IS 1	-	BUILT IN BIAS RESISTANCE RATIO IS 21.36
Maximum collector current (IC)	0.1 A	0.1 A	-	0.1 A
Collector-emitter maximum voltage	50 V	50 V	-	50 V
Configuration	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR	-	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
JESD-30 code	R-PDSO-G6	R-PDSO-F6	-	R-PDSO-G6
Number of terminals	6	6	-	6
Maximum operating temperature	150 °C	150 °C	-	150 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	-	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	-	260
Certification status	Not Qualified	Not Qualified	-	Not Qualified
Terminal form	GULL WING	FLAT	-	GULL WING
Terminal location	DUAL	DUAL	-	DUAL
Maximum time at peak reflow temperature	40	NOT SPECIFIED	-	40
transistor applications	SWITCHING	SWITCHING	-	SWITCHING

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