PRELIMINARY
PDM31096
4 Megabit 3.3V Static RAM
512K x 8-Bit
Features
n
Description
The PDM31096 is a high-performance CMOS static
RAM organized as 524,288 x 8 bits. Writing is
accomplished when the write enable (WE) and chip
enable CE inputs are both LOW. Reading is
accomplished when WE remains HIGH and CE and
OE are both LOW.
The PDM31096 operates from a single +3.3V power
supply and all the inputs and outputs are fully TTL-
compatible.
The PDM31096 is available in a 36-pin 400-mil plas-
tic SOJ package and a 44-pin plastic TSOP (II)
package.
1
2
3
4
5
6
High-speed access times
Com’l: 8, 10, 12, 15, and 20 ns
Ind’l.: 12, 15 and 20 ns
Low power operation
- PDM31096SA
Active: 300 mA (Max)
Standby: 25mW
Single +3.3V (±0.3V) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (400 mil) - SO
Plastic TSOP (II) - T
n
n
n
n
Functional Block Diagram
A
0
•
•
•
•
•
A
18
7
Decoder
•
•
•
•
•
•
Memory
Matrix
8
9
10
Addresses
I/O
0
•
•
I/O
7
• • • • •
Input
Data
Control
Column I/O
•
•
11
12
1
CE
WE
OE
•
Rev. 2.4 - 5/27/98
PRELIMINARY
PDM31096
Pin Configuration
TSOP (II)
NC
NC
A4
A3
A2
A1
A0
CE
I/OO
I/O1
Vcc
Vss
I/O2
I/O3
WE
A18
A17
A16
A15
A14
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
NC
A5
A6
A7
A8
OE
I/O7
I/O6
Vss
Vcc
I/O5
I/O4
A9
A10
A11
A12
A13
NC
NC
NC
A4
A3
A2
A1
A0
CE
I/O0
I/O1
Vcc
Vss
I/O2
I/O3
WE
A18
A17
A16
A15
A14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
SOJ
Pin Description
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A5
A6
A7
A8
OE
I/O7
I/O6
Vss
Vcc
I/O5
I/O4
A9
A10
A11
A12
A13
NC
Name
A18-A0
I/O7-I/O0
OE
WE
CE
NC
V
CC
V
SS
Description
Address Inputs
Data Inputs/Outputs
Output Enable Input
Write Enable Input
Chip Enable Inputs
No Connect
Power (+3.3V)
Ground
Truth Table
(1)
OE
X
X
L
X
H
WE
X
X
H
L
H
CE
H
X
L
L
L
I/O
Hi-Z
Hi-Z
D
OUT
D
IN
Hi-Z
MODE
Standby
Standby
Read
Write
Output Disable
NOTE: 1. H = V
IH
, L = V
IL
, X = DON’T CARE
Absolute Maximum Ratings
(1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
T
j
Rating
Terminal Voltage with Respect to V
SS
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Maximum Junction Temperature
(2)
Com’l.
–0.5 to +4.6
–55 to +125
–55 to +125
1.0
50
125
Ind.
–0.5 to +4.6
–65 to +135
–65 to +150
1.0
50
145
Unit
V
°C
°C
W
mA
°C
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Appropriate thermal calculations should be performed in all cases and specifically for
those where the chosen package has a large thermal resistance (e.g., TSOP). The cal-
culation should be of the form
: T
j
= T
a
+ P *
θ
ja
where T
a
is the ambient temperature, P
is average operating power and
θ
ja
the thermal resistance of the package. For this
product, use the following
θ
ja
value:
SOJ: 59
o
C/W
TSOP : TBD
2
Rev. 2.4 - 5/27/98
PRELIMINARY
PDM31096
DC Electrical Characteristics
(V
CC
= 3.3V
±
0.3V)
Symbol
I
LI
I
LO
Parameter
Input Leakage Current
Output Leakage Current
Test Conditions
V
CC
= Max., V
IN
= V
SS
to V
CC
V
CC
= Max.,
CE = V
IH
V
OUT
= V
SS
to V
CC
Min.
–5
–5
Max.
5
5
Unit
µA
µA
1
2
3
4
V
IL
V
IH
V
OL
V
OH
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 8 mA, V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
–0.3
(1)
2.2
—
2.4
0.8
Vcc+0.3
0.4
—
V
V
V
V
NOTE:1.V
IL
(min) = –3.0V for pulse width less than 20 ns
Power Supply Characteristics
-8
Symbol Parameter
I
CC
Operating Current
CE = V
IL
f = f
MAX
= 1/t
RC
V
CC
= Max.
I
OUT
= 0 mA
I
SB
Standby Current
CE = V
IH
f = f
MAX
= 1/t
RC
V
CC
= Max.
I
SB1
Full Standby Current
CE
≥
V
CC
– 0.2V
f=0
V
CC
= Max.,
V
IN
≥
V
CC
– 0.2V or
≤
0.2V
10
10
10
15
10
15
10
15
mA
50
45
40
45
35
40
30
35
mA
Com’l.
230
-10
Com’l.
215
-12
-15
-20
Unit
mA
Com’l Ind. Com’l Ind. Com’l Ind.
200
220
160
200
120
160
5
6
7
8
9
10
NOTES: All values are maximum guaranteed values.
Capacitance
(1)
(T
A
= +25°C, f = 1.0 MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Max.
8
8
Unit
pF
pF
11
12
NOTE: 1. This parameter is determined by device characterization but is not production tested.
Rev. 2.4 - 5/27/98
3
PRELIMINARY
PDM31096
Recommended DC Operating Conditions
Symbol
V
CC
V
SS
Industrial
Commercial
Parameter
Supply Voltage
Supply Voltage
Ambient Temperature
Ambient Temperature
Min.
3.0
0
–40
–0
Typ.
3.3
0
25
25
Max.
3.6
0
85
70
Unit
V
V
°C
°C
AC Test Conditions
Input pulse levels
Input rise and fall times
Input timing reference levels
Output reference levels
Output load
V
SS
to 3.0V
2.5 ns
1.5V
1.5V
See Figures 1 and 2
+3.3V
317Ω
D
OUT
351Ω
30 pF
D
OUT
351Ω
+3.3V
317Ω
5 pF
Figure 1. Output Load Equivalent
Figure 2. Output Load Equivalent
(for t
LZCE
, t
HZCE
, t
LZWE
, t
HZWE
, t
LZOE
,
t
HZOE
)
4
Rev. 2.4 - 5/27/98
PRELIMINARY
PDM31096
Read Cycle No. 1
(4, 5)
t
RC
ADDR
1
2
DATA VALID
t
AA
t
OH
DOUT
PREVIOUS DATA VALID
Read Cycle No. 2
(2, 4, 6)
t
RC
ADDR
3
t
AA
t
ACE
4
5
CE
t
LZCE
OE
t
HZCE
t
LZOE
D
OUT
t
HZOE
DATA VALID
6
7
8
t
AOE
AC Electrical Characteristics
Description
READ Cycle
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in low Z
(1,3)
Chip disable to output in high Z
(1,2,3)
Output enable access time
Output Enable to output in low Z
(1,3)
Output disable to output in high Z
(1,3)
Sym
t
RC
t
AA
t
ACE
t
OH
t
LZCE
t
HZCE
t
AOE
t
LZOE
t
HZOE
Min
-8*
Max
Min
-10*
Max
Min
–12
Max
Min
–15
Max
Min
–20
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
9
—
20
20
—
—
7
8
—
7
8
—
—
3
3
—
—
0
—
—
8
8
—
—
4
4
—
4
10
—
—
3
3
—
—
0
—
—
10
10
—
—
5
5
—
4
12
—
—
3
3
—
—
0
—
—
12
12
—
—
6
6
—
5
15
—
—
3
3
—
—
0
—
—
15
15
—
—
7
7
—
6
20
—
—
3
3
—
—
0
—
10
11
12
5
* V
cc
= 3.3V +5%
Rev. 2.4 - 5/27/98
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