HV
QF
N3
2
BGA7210
700 MHz to 3800 MHz high linearity variable gain amplifier
Rev. 5 — 20 January 2017
Product data sheet
1. Product profile
1.1 General description
The BGA7210 MMIC is, also known as the BTS6001A, an extremely linear Variable Gain
Amplifier (VGA), operating from 0.7 GHz to 3.8 GHz. The maximum gain is 30 dB. It has
an attenuation range of 31.5 dB. At its minimum attenuation setting it has a maximum
output power of 21 dBm, an IP3
O
of 39 dBm and a noise figure of 6.5 dB.
The current consumption can be optimized per attenuation setting allowing for optimized
overall system performance. The current consumption and attenuation level are controlled
through a Serial Peripheral Interface (SPI). The current can be reduced to 120 mA.
Optimal linearity performance is obtained at 185 mA. The BGA7210 has a fast switching
power-down pin to further reduce current consumption during idle time.
The BGA7210 has been designed and qualified for the severe mission profile of cellular
base stations, but its outstanding RF performance and interfacing flexibility make it
suitable for a wide variety of applications.
The BGA7210 is housed in a 32 pins 5 mm
5 mm leadless HVQFN32 package.
1.2 Features and benefits
Operating frequency range from 0.7 GHz to 3.8 GHz
High gain of 30 dB
High IP3
O
of 39 dBm
Attenuation range of 31.5 dB with 0.5 dB step (6 bit)
Maximum output power of 21 dBm
Noise figure of 6.5 dB at maximum gain
ESD protection on all pins (HBM 4 kV; CDM 2 kV)
Fast switching power-save mode
Moisture sensitivity level 1
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
IF and RF applications
WiMAX and cellular base stations
Cable modem termination systems
Temperature compensation circuits
NXP Semiconductors
BGA7210
700 MHz to 3800 MHz high linearity variable gain amplifier
1.4 Quick reference data
Table 1.
Quick reference data
4.75 V
V
SUP
5.25 V;
40
C
T
amb
+85
C; maximum current; input and output is terminated with 50
;
unless otherwise specified.
Symbol Parameter
V
SUP
I
CC(tot)
supply voltage
total supply current
maximum current
optimized current
minimum current
power-down current
T
amb
G
p
ambient temperature
power gain
minimum attenuation
700 MHz
f
1400 MHz
1400 MHz
f
1700 MHz
1700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
3400 MHz
f
3800 MHz
range
attenuation range
700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
3400 MHz
f
3800 MHz
NF
noise figure
minimum attenuation
700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
3400 MHz
f
3800 MHz
maximum attenuation
700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
3400 MHz
f
3800 MHz
IP3
O
output third-order intercept point
minimum attenuation
700 MHz
f
1400 MHz
1400 MHz
f
1700 MHz
1700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
2200 MHz
f
2800 MHz; C
sh
= 0.68 pF
3400 MHz
f
3800 MHz
maximum attenuation
700 MHz
f
1400 MHz
1400 MHz
f
1700 MHz
1700 MHz
f
2200 MHz
2200 MHz
f
2800 MHz
2200 MHz
f
2800 MHz; C
sh
= 0.68 pF
3400 MHz
f
3800 MHz
[4]
[3]
[4]
[3]
[2]
Conditions
[1]
Min Typ Max Unit
4.75 5.0
160
-
-
-
40
26
26
26
25
22
28
27
26
-
-
-
-
-
-
34
32
30
28
30
24
-
-
-
-
-
-
195
185
120
15
5.25 V
230
-
-
-
mA
mA
mA
mA
+25 +85
C
30
29
28
26
33
33
31
30
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
29.5 33
31.5 35
30.5 34
29.5 33
6.5
7
8
8.5
9
10
27.5 30.5 dB
28
31
dB
dB
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
28.5 32
39
37
35
34
35
30
35
33
31
30
30
25
-
-
-
-
-
-
-
-
-
-
-
-
BGA7210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Product data sheet
Rev. 5 — 20 January 2017
2 of 30
NXP Semiconductors
BGA7210
700 MHz to 3800 MHz high linearity variable gain amplifier
Table 1.
Quick reference data
…continued
4.75 V
V
SUP
5.25 V;
40
C
T
amb
+85
C; maximum current; input and output is terminated with 50
;
unless otherwise specified.
Symbol Parameter
P
L(1dB)
Conditions
700 MHz
f
2800 MHz
2200 MHz
f
2800 MHz; C
sh
= 0.68 pF
3400 MHz
f
3800 MHz
[1]
[2]
[3]
[4]
Supply voltage on pins RF_OUT, V
CC2
, V
DDA
, V
CC1
and V
DDD
.
See
Section 9.2.
P
i
=
23
dBm per tone;
f
= 10 MHz.
See
Section 11.
[4]
Min Typ Max Unit
18
20
16
21
23
19
-
-
-
dBm
dBm
dBm
output power at 1 dB gain compression minimum attenuation
2. Pinning information
2.1 Pinning
29 RF_IN
32 GND
31 GND
28 GND
27 GND
26 GND
25 GND
24 PUPMXG/PWRDN
23 CLK
22 SER_IN
21 SS
20 SER_OUT
19 V
DDD
18 GND
17 V
CC1
GND 10
RF_OUT 12
GND 13
GND 14
V
CC2
15
V
DDA
16
n.c. 11
9
aaa-000658
terminal 1
index area
GND
GND
GND
GND
GND
GND
GND
GND
1
2
3
4
5
6
7
8
GND
Transparent top view
Transparent top view
Fig 1.
Pin configuration
2.2 Pin description
Table 2.
Symbol
GND
n.c.
RF_OUT
V
CC2
V
DDA
BGA7210
Pin description
Pin
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 13,
14, 18, 25, 26, 27, 28, 31, 32
11, 30
12
15
16
Description
Ground
not connected
RF output and supply to amplifier 2
Supply voltage to amplifier 2
Analog supply voltage to DSA
© NXP B.V. 2017. All rights reserved.
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 5 — 20 January 2017
30 n.c.
BGA7210
3 of 30
NXP Semiconductors
BGA7210
700 MHz to 3800 MHz high linearity variable gain amplifier
Pin description
…continued
Pin
17
19
20
21
22
23
24
29
Description
Supply voltage to amplifier 1
Digital supply voltage to digital controller
SPI data output
SPI slave select (0 = select; 1 = deselect)
SPI data input
SPI clock input
Power-up gain attenuation / power down
RF input
Table 2.
Symbol
V
CC1
V
DDD
SER_OUT
SS
SER_IN
CLK
PUPMXG/PWRDN
RF_IN
3. Ordering information
Table 3.
Ordering information
Name
BGA7210
HVQFN32
Description
plastic thermal enhanced very thin quad flat package;
no leads; 32 terminals; body 5
5
0.85 mm
Version
SOT617-3
Type number Package
4. Marking
Table 4.
BGA7210
Marking
Marking code
7210
Type number
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
SUP
V
I
V
O
I
I
I
O
P
RFIN
T
stg
T
j
V
ESD
supply voltage
input voltage
output voltage
input current
output current
power on pin RF_IN
storage temperature
junction temperature
electrostatic
discharge voltage
Human Body Model (HBM); According
to JEDEC standard 22-A114E
Charged Device Model (CDM); According
to JEDEC standard 22-C101B
[1]
[2]
Absolute maximum DC voltage on pins RF_OUT, V
CC2
, V
DDA
, V
CC1
, V
DDD
and RF_IN.
Absolute maximum DC voltage on pins SS, SER_IN, CLK and PUPMXG/PWRDN.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Conditions
[1]
[2]
[3]
[4]
[5]
Min
Max
Unit
V
V
V
mA
mA
dBm
C
kV
kV
0.6
+8
0.6
+8
0.6
+8
20
20
-
65
-
-
-
+20
+20
30
150
4
2
+150
C
BGA7210
Product data sheet
Rev. 5 — 20 January 2017
4 of 30
NXP Semiconductors
BGA7210
700 MHz to 3800 MHz high linearity variable gain amplifier
[3]
[4]
[5]
Absolute maximum DC voltage on pin SER_OUT.
Absolute maximum DC current through pins SS, SER_IN, CLK and PUPMXG/PWRDN.
Absolute maximum DC current through pin SER_OUT.
6. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
[1]
Thermal characteristics
Parameter
thermal resistance from junction to solder point
Conditions
T
sp
85
C
[1]
Typ
16
Unit
K/W
T
sp
is the temperature at the solder point.
7. Static characteristics
Table 7.
Symbol
V
SUP
I
CC(tot)
Static characteristics
Parameter
supply voltage
total supply current
maximum
optimized current
minimum current
power-down current
T
amb
I
CC
ambient temperature
supply current
supply current
supply current
supply current
supply current
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
[1]
[2]
[3]
[4]
[2]
Conditions
[1]
Min
160
-
-
-
40
-
-
-
-
-
[3]
[3]
[4]
[4]
[4]
[4]
Typ Max
5.25
195 230
185 -
120 -
15
85
45
5
55
5
3.3
3.3
-
-
-
-
-
-
-
-
+0.8
V
SUP
+ 0.1
+0.8
3.4
0
15
+25 +85
Unit
V
mA
mA
mA
mA
C
mA
mA
mA
mA
mA
V
V
V
V
mA
mA
4.75 5.0
on pin RF_OUT
on pin V
CC2
on pin V
DDA
on pin V
CC1
on pin V
DDD
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
HIGH-level output voltage
LOW-level output current
HIGH-level output current
Supply voltage on pins RF_OUT, V
CC2
, V
DDA
, V
CC1
and V
DDD
.
See
Section 9.2.
Digital input pins are: SS, SER_IN, CLK and PUPMXG/PWRDN.
Digital output pin is: SER_OUT.
0.1
0
2
2.5
15
0
0.1
0
BGA7210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Product data sheet
Rev. 5 — 20 January 2017
5 of 30
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