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LC99104

Description
Analog Circuit, 1 Func, CQCC18
CategoryAnalog mixed-signal IC    The signal circuit   
File Size80KB,9 Pages
ManufacturerSANYO
Websitehttp://www.semic.sanyo.co.jp/english/index-e.html
Download Datasheet Parametric View All

LC99104 Overview

Analog Circuit, 1 Func, CQCC18

LC99104 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSANYO
package instructionQCCN,
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesANALOG CIRCUIT
JESD-30 codeR-CQCC-N18
JESD-609 codee0
length14.3 mm
Number of functions1
Number of terminals18
Maximum operating temperature60 °C
Minimum operating temperature-10 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum supply voltage (Vsup)15.5 V
Minimum supply voltage (Vsup)14.5 V
Nominal supply voltage (Vsup)15 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch2.54 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.8 mm

LC99104 Preview

Ordering number : ENN6247
LC99104
1/4-Inch Optical Size Frame Transfer Type
VGA Compatible B/W Image Sensor
Overview
The LC99104 is a black-and-white VGA frame transfer
CCD solid-state imaging device for 1/4-inch optical
systems. It was developed for use in consumer image
input products.
Package Dimensions
unit: mm
3242
[LC99104]
Features
• VGA format compatible
• Reads each pixel independently
• Horizontal dual read method (Each horizontal line is
read twice: odd line and even line; Therefore, signal
processing requires line memory.)
• Variable speed electronic shutter possible (1/8 to 1/4000 s)
14.3
8.0
1.015
(1.2)
1.0
1.49
1.05
R1.0
0.44
Resin
(R0.6)
11.8
10.16
0.7
2.54
Glass
1.2
Optical Center
4.53
6.0
12.3
(R0.5)
0.635
1.075
2.0
R0.25
Device Structure
• Effective pixel count [total pixels] :
654H
×
490V [710H
×
510V]
• Number of optical black pixels :
H direction : 44 pixels in front, 12 pixels in back
V direction : 8 pixels above, 12 pixels below
• Dummy bit : H direction 4 pixels
• Unit cell size : 5.55 µm (H)
×
5.55 µm (V)
• Square lattice
• Parallel gate type CCD sensor
• Both imaging block and storage block are composed of
710H
×
510V pixels
• 3-phase drive for imaging block and storage block,
2-phase drive for horizontal block
• Built-in high-sensitivity output amplifier
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D1599TH (OT)/30899TH (OT) No. 6247-1/9
7.62
Sensor
8.6
1.0
R0.3
LC99104
Specifications
Absolute Maximum Ratings
Parameter
Supply voltage
Load gate voltage
N-substrate-P-well voltage
N-substrate-imaging block voltage
Horizontal clock, reset gate voltage
Clock voltage
Pin voltage
Operating temperature
Storage temperature
Topr
Tstg
Symbol
V
DD
, V
RD
V
GG
NSUB-PW
NSUB
V
RD
V
PW
= 0 V
V
PW
= 0 V
V
PW
= 0 V
ø1 to ø3, øS1 to øS3, TG1, TG2: V
PW
= 0 V
Horizontal clock pin, øR: V
PW
= 0
Clock pins other than listed above, V
PW
= 0 V
Pins other than listed above, V
PW
= 0 V
Conditions
Ratings
– 0.3 to + 18
– 0.3 to + 3
– 0.3 to + 50
– 0.3 to + 55
– 0.3 to + 18
– 15 to + 18
– 0.3 to + 10
–10 to +60
–30 to +80
Unit
V
V
V
V
V
V
V
°C
°C
Block Diagram
VPW
1
Optical black block
18 NSUB
ø3
ø2
ø1
2
3
4
Imaging block
17 øS1
Storage block
16 øS2
15 øS3
TG1
5
øR
VRD
VDD
6
7
8
4 dummy bits
Output block
Transfer gate
Horizontal shift register (CCD)
14 TG2
9
10
11
VOG
12
øH2
13
øH1
A12552
VOUT VGG
No. 6247-2/9
LC99104
Pin Assignment
ø3
VPW
NSUB
øS1
2
ø2
3
1
18
17
16
øS2
ø1
4
15
øS3
TG1
5
14
TG2
øR
6
13
øH1
VRD
7
8
9
10
11
12
øH2
VDD
VOUT
VGG
VOG
(Top view)
A12553
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
Symbol
V
PW
ø3
ø2
ø1
TG1
øR
V
RD
V
DD
V
OUT
NSUB
øS1
øS2
øS3
TG2
øH1
øH2
V
OG
V
GG
Transfer gate
Horizontal block clock
CCD output gate
Load gate
Storage block clock
Transfer gate
Reset gate
Reset drain
Supply voltage
CCD output
N substrate
Imaging block clock
P well
Pin Description
No. 6247-3/9
LC99104
Clock Voltage Conditions
when the LC89902V CCD driver is used
Parameter
Imaging block pulses: ø1, ø2, ø3
High level
Low level
Storage block pulses: øS1, øS2, øS3
High level
Low level
Transfer gate pulses: TG1, TG2
Pulse amplitude
Low level
Horizontal transfer pulses: øH1, øH2
Pulse amplitude
Low level
Reset gate: øR
Pulse amplitude
Low level
Substrate pulse: øNSUB
High level
Low level
V
HSUB
V
LSUB
39.0
20.0
40.0
21.0
41.0
22.0
V
V
V
PR
V
LR
*1
4.5
3.5
5.0
5.5
7.5
V
V
V
PH
V
LH
4.5
0
5.0
0
5.5
0.5
V
V
V
PTG
V
LTG
15.0
–7.0
15.5
–6.0
16.0
–5.0
V
V
V
PSL
V
LSL
4.5
–11.0
5.0
–10.5
5.5
–10.0
V
V
V
PIF
V
LIF
4.5
–11.0
5.0
–10.5
5.5
–10.0
V
V
Symbol
Conditions
Ratings
min
typ
max
Unit
Note:
*1
This must be adjusted so that image deterioration does not occur.
Shutter pulse
*2
Slice pulse
VHSUB
øNSUB
VLSUB
Charge sweep-out pulse
Frame shift
Imaging block pulses
ø1
One field
ø2, ø3
A12554
Note:
*2
If a shutter operation is performed when there is a signal in the storage block (that is, during signal readout), charge may be lost from the storage
block. Therefore, applications must not perform shutter operations with this timing.
Bias Conditions
Parameter
P well
Output circuit voltage
Output circuit voltage
Reset drain
OG bias
Symbol
V
PW
V
DD
V
GG
V
RD
V
OG
*2
*1
*2
14.5
1.2
12.5
3
Conditions
Ratings
min
typ
0
15.0
1.5
13.0
3.5
15.5
1.8
13.5
4
max
Unit
V
V
V
V
V
Notes: 1. This level must never rise above the substrate pulse low level, V
LSUB
.
2. These input pins are high-impedance inputs.
No. 6247-4/9
LC99104
DC Characteristics
Parameter
DC operating current
Symbol
I
DD
Conditions
Ratings
min
4.5
typ
7.0
max
11.0
Unit
mA
Imaging Characteristics
(Storage time: 1/20 s) at Ta = 25°C
Parameter
Sensitivity
Image signal uniformity
Saturated signal
Smear
Dark signal
γ
characteristics
Symbol
S
VF
Vsat
SM
Vdark
γ
Conditions
Test procedure 1
Test procedure 2
Test procedure 3
Test procedure 4
*
Test procedure 5, Ta = 55°C
1
400
0.035
14
Ratings
min
200
15
typ
max
Unit
mV
%
mV
%
mV
Note:
*
When the frame shift frequency is 3.0 MHz, and when the storage time is 1/20 s.
Test Procedures
Use the standard drive conditions (see pages 3 and 4), the Sanyo evaluation unit, and the Advantest T8331 tester for the
following tests.
1. Sensitivity
Use the CCD-SY1 (manufactured by Wakasa Optical Institute, Ltd.) as the light source, and illuminate the surface of
the device to an intensity of 5 lux. Use the T8331 manufactured by Advantest to measure the CCD output from center
of the screen as shown in the figure below to determine the sensitivity.
V/4
H/4
H/4
V/4
A12555
2. Image signal uniformity
Perform this test under the following conditions.
• Standard drive conditions (See the device specifications.)
• Use a Halogen lamp with a color temperature of 3200 °K as the light source.
• Use a C-500 (1 mm thick) IR blocking filter.
Set the CCD surface illumination to 5 lux and divide the screen into 45 blocks as shown below. Measure the average
value for each block and determine the maximum, minimum, and mean values. Determine the ratio of the difference
(between the maximum and the minimum values) and the mean value.
VF =
Maximum of the block averages – Minimum of the block averages
Mean of the block averages
No. 6247-5/9
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