Ordering number : ENN6246A
LC99160GL-TP
1/4-Inch Optical Size ITU601 Format Compliant
Color Solid-State Image Sensor
Overview
The LC99160GL is a 1/4-inch optical size frame transfer
CCD solid state image sensor supporting ITU601 format .
In addition to interlace read-out, it enables all-pixel read-
out (progressive scan), in which signals from all-pixeles
can be read in one frame. Using with Sanyo’s signal
processing IC LC99501, it provides NTSC, PAL, or VGA
format video signal.
Package Dimensions
unit: mm
3242
[LC99160GL-TP]
14.3
8.0
1.015
(1.2)
1.49
1.05
R1.0
0.44
Resin
1.0
10.16
0.7
2.54
(R0.6)
11.8
Glass
• Supports ITU601 format
• Interlace read-out/all-pixel read-out (progressive scan)
• Variable speed electronic shutter
1.2
Optical Center
4.53
6.0
12.3
(R0.5)
0.635
1.075
2.0
R0.25
Element Structure
• Number of effective pixels 736H
×
490V
• Number of total pixels 780H
×
510V
• Number of optical black pixels :
H direction : 32 pixels (front), 12 pixels (rear)
V direction : 8 pixels (above), 12 pixels (below)
• Dummy bit : 4 pixels (H front)
• Unit cell size : 5.00 µm (H)
×
5.55 µm (V)
• Complementary color stripe filter (Ye, Cy, Mg)
• Parallel gate type CCD sensor
• Both imaging and storage areas are composed of 780H
×
510V pixels
• 3-phase drive for imaging and storage areas,
2-phase drive for horizontal area
• Built-in high-sensitivity output amplifier
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
30300TH (OT)/30899TH (OT) No.6246-1/9
7.62
Sensor
8.6
1.0
Features
R0.3
LC99160GL-TP
Specifications
Absolute Maximum Ratings
at Ta = 25°C
Parameter
Supply voltage
Load gate voltage
N-substrate-P-well voltage
N-substrate-imaging block voltage
Horizontal clock, reset gate voltage
Clock voltage
Pin voltage
Operating temperature
Storage temperature
Topr
Tstg
Symbol
V
DD,
V
RD
V
GG
V
PW
= 0 V
V
PW
= 0 V
NSUB-VPW, V
PW
= 0
NSUB-PI1 to PI3, PS1 to PS3, V
PW
= 0 V
Horizontal clock pin, PR, V
PW
= 0 V
Clock pins other than listed above, V
PW
= 0 V
Pins other than listed above
Conditions
Ratings
– 0.3 to + 15
– 0.3 to + 3
– 0.3 to + 35
– 0.3 to + 35
– 0.3 to + 15
– 15 to + 15
– 0.3 to + 10
–10 to +60
–30 to +80
Unit
V
V
V
V
V
V
V
°C
°C
Block Diagram
Optical black area
VPW
1
8 pixels
NC
2
18
NSUB
PI3
3
Imaging area
PI2
4
12 pixels
PI1
5
32 pixels
12 pixels
17
NC
16
PR
6
PS1
Storage area
15
PS2
14
PS3
VRD
7
Output Amplifire
VDD
8
Horizontal shift register (CCD)
13
PH1
12
PH2
4 dummy bits
11
VOUT
9
10
VGG
VOG
A12560
No. 6246-2/9
LC99160GL-TP
Pixel Assignment
Optical black area
32 pixels
Optical black area
12 pixels
8 pixels
490
1
Ye
2
Cy
3
Mg
4
Ye
5
Cy
732 733 734 735 736
Mg
Ye
Cy
Mg
Ye
Imaging area
Effective pixels
736H
×
490V
1
12 pixels
Ye
Cy
Mg
Ye
Cy
Mg
Ye
Cy
Mg
Ye
Storage area
Total pixels
780H
×
510V
4 dummy bits
Horizontal shift register (780 pixels)
A12561
No. 6246-3/9
LC99160GL-TP
Pin Assignment
NC
2
VPW
1
NSUB
18
NC
17
PI3
3
16
PS1
PI2
4
15
PS2
PI1
5
14
PS3
PR
6
13
PH1
VRD
7
12
PH2
8
VDD
9
VOUT
10
VGG
11
VOG
A12562
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
Symbol
VPW
NC
PI3
PI2
PI1
PR
V
RD
V
DD
VOUT
Reset gate
Reset drain
Supply voltage
CCD output
Imaging area clock
P well
Pin Description
Pin No.
18
17
16
15
14
13
12
11
10
Symbol
NSUB
NC
PS1
PS2
PS3
PH1
PH2
V
OG
V
GG
Horizontal area clock
CCD output gate
Load gate
Storage area clock
Pin Description
N substrate
No. 6246-4/9
LC99160GL-TP
Clock Voltage Conditions,
when the LC89901V CCD driver is used.
Parameter
Image area pulse signals
High level
Low level
Storage area pulse signals
High level
Low level
Horizontal transfer pulse signals
Pulse amplitude
Low level
Reset gate
Pulse amplitude
Low level
Substrate pulse signal
High level
Low level
V
HSUB
V
LSUB
NSUB
19.5
11.5
Shutter pulse
20.0
12.0
20.5
12.5
V
V
V
PR
V
LR
PR
*2
PR
4.7
3.2
5.0
3.5
5.3
3.8
V
V
V
PH
V
LH
*1
PH1, PH2
PH1, PH2
3.0
0.0
3.3
0
3.6
0.5
V
V
V
PSL
V
LSL
PS1 to PS3
4.7
–7.3
5.0
–7.0
5.3
–6.7
V
V
V
PIF
V
LIF
PI1 to PI3
4.7
–7.3
5.0
–7.0
5.3
–6.7
V
V
Symbol
Conditions
Ratings
min
typ
max
Unit
Slice pulse
VHSUB
P-NSUB
VLSUB
Frame shift
Charge sweep-out pulse
Frame shift
Image area pulse
One field
PI1
PI2
PI3
A12563
Bias Conditions
Parameter
P well
Output circuit voltage
Reset drain
OG bias
Symbol
V
PW
V
DD
V
GG
V
RD
V
OG
*2
*1
*2
11.5
1.7
9.5
2.2
Conditions
Ratings
min
typ
0
12.0
2.0
10.0
2.5
12.5
2.3
10.5
2.8
max
Unit
V
V
V
V
V
Notes: 1. The substrate pulse signal low level must not be higher than V
LSUB
.
2. These input pins are high-impedance inputs.
No. 6246-5/9
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