TDA18214
Silicon tuner for digital terrestrial and cable TV reception
Rev. 2 — 11 February 2013
Product short data sheet
1. General description
The TDA18214AHN and TDA18214HN are high performance silicon tuners designed for
digital terrestrial and digital cable TV reception.
The TDA18214AHN and TDA18214HN support all digital TV standards and deliver a Low
IF (LIF) signal to a demodulator.
The TDA18214AHN and TDA18214HN facilitate STB design by:
•
•
•
•
Allowing on-board integration
Drastically reducing the tuner Bill Of Material (BOM)
Providing flexibility in system solution development
Allowing straightforward, cost effective dual and multi-tuner applications optimization
In multi-tuner application, the TDA18214AHN is the master tuner whereas the
TDA18214HN is a slave tuner.
2. Features and benefits
Single 3.3 V supply voltage
Worldwide multistandard digital terrestrial and digital cable capabilities
Alignment free
RoHS compliant
I
2
C-bus interface compatible with 3.3 V microcontrollers
Crystal oscillator output buffer
Slave Tuner Output (STO) for multi-tuner applications (TDA18214AHN only)
Fully integrated oscillators
2 programmable General-Purpose Outputs (GPO)
Loop-Through Output (LTO)
1.7 MHz, 6 MHz, 7 MHz, 8 MHz and 10 MHz channel bandwidths
LIF channel center frequency output ranging from 0.8 MHz to 7.5 MHz
Fully integrated IF selectivity; eliminating the need for external SAW filters
Large flexibility in the IF filtering stage to ease the matching with various demodulators
circuits
Single-ended RF input, no need for external balun
Up to 1 GHz RF input capability
Excellent return loss compatible with cable requirements
Power Level Detector (PLD) embedded
Integrated gain control
NXP Semiconductors
TDA18214
Silicon tuner for digital terrestrial and cable TV reception
Very fast tuning time
Strong immunity to LTE interferers in the digital dividend bandwidth
Strong immunity to WLAN interferers
3. Quick reference data
Table 1.
f
RF
NF
tun
Quick reference data
Conditions
full range of RF input
75
impedance source;
maximum gain
LNA Z
i
= 1 and
RF < 870 MHz
LNA Z
i
= 1 and
870 MHz < RF < 1 GHz
jit
image
phase jitter
image rejection
integrated from 250 Hz to
4 MHz
worst case, measured at
4 MHz IF frequency and for
image levels above
60 dBV
[1]
Symbol Parameter
RF frequency
tuner noise figure
Min
42
Typ
-
Max
1002
Unit
MHz
-
-
-
57.5
4.0
5.4
0.4
63
4.6
6
0.6
-
dB
dB
degree
dB
CSO
composite
worst interferer over RF
second-order distortion frequency with respect to
wanted carrier
composite triple beat
worst interferer over RF
frequency with respect to
wanted carrier for frequency
550 MHz
worst interferer over RF
frequency with respect to
wanted carrier for frequency
> 550 MHz
-
60
50
dBc
CTB
[1]
-
-65
60
dBc
[1]
-
-
55
dBc
ICP
1dB
[1]
1 dB input
compression point
at the tuner input and
minimum gain
120
-
-
dBV
Test scenario: 129 channels each 75 dBV.
4. Ordering information
Table 2.
Ordering information
Package
Name
TDA18214AHN/C1
TDA18214HN/C1
Description
Version
SOT618-6
HVQFN40 plastic thermal enhanced very thin quad flat
package; no leads; 40 terminals; body
6
6
0.85 mm
Type number
TDA18214_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 2 — 11 February 2013
2 of 8
NXP Semiconductors
TDA18214
Silicon tuner for digital terrestrial and cable TV reception
5. Block diagram
to a second
TDA18214AHN
or to a
TDA18214HN
loop-through
output
CAPRFAGC
LTO
LNA/RF
splitter
RF tracking
filter
H3H5 and
wireless filter
IR mixer
IF filters
IF amplifier
TDA18214AHN
STO
RFIN
IFP
IFN
SURGE AND CB
TRAP FILTER
RF AGC
VIFAGC
LO
DIVIDER
GAIN
MANAGEMENT
POWER LEVEL
DETECTOR
TEMPERATURE
SENSOR
LC-VCO
CAPSMOOTH
XTALINSEL
clock input
buffer
SCL
I
2
C-bus
INTERFACE
SDA
AS
XTALP
Xtal
oscillator
∆∑ PLL
XTALN
XTOUT1
XTOUT2
CP
VTUNE
clock output
buffer
VCO
REGULATOR
l/O
IRQ
CAPREGVCO
GPO2
GPO1/RFAGC_SENSE
PLL loop
filter
aaa-002614
Fig 1.
TDA18214AHN block diagram
TDA18214_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 2 — 11 February 2013
3 of 8
NXP Semiconductors
TDA18214
Silicon tuner for digital terrestrial and cable TV reception
loop-through
output
CAPRFAGC
LTO
TDA18214HN
n.c.
SURGE AND CB
TRAP FILTER
RFIN
LNA/RF
splitter
RF tracking
filter
H3H5 and
wireless filter
IR mixer
IF filters
IF amplifier
IFP
IFN
RF AGC
VIFAGC
LO
DIVIDER
GAIN
MANAGEMENT
POWER LEVEL
DETECTOR
TEMPERATURE
SENSOR
LC-VCO
CAPSMOOTH
XTALINSEL
clock input
buffer
SCL
I
2
C-bus
INTERFACE
SDA
AS
XTALP
Xtal
oscillator
∆∑ PLL
XTALN
XTOUT1
XTOUT2
CP
VTUNE
clock output
buffer
VCO
REGULATOR
l/O
IRQ
CAPREGVCO
GPO2
GPO1/RFAGC_SENSE
PLL loop
filter
aaa-002615
Fig 2.
TDA18214HN block diagram
6. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
CC
V
I
T
stg
T
j
T
amb
V
ESD
supply voltage
input voltage
storage temperature
junction temperature
ambient temperature
electrostatic discharge voltage
EIA/JESD22-A114 (HBM)
EIA/JESD22-C101-C (FCDM) class III
[2]
GPO pins: GPO1/RFAGC_SENSE and GPO2
V
CC
I
CC
supply voltage
supply current
0 V < V
pu
< 5.5 V; R
pu
> 390
corresponding GPO ON
0.3
20
+5.5
0
V
mA
V
CC
< 3.3 V
V
CC
> 3.3 V
Conditions
Min
0.3
0.3
0.3
40
-
20
2
750
Max
+3.6
+3.6
+150
150
[1]
Unit
V
V
C
C
C
kV
V
V
CC
+ 0.3 V
+2
-
TDA18214_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 2 — 11 February 2013
4 of 8
NXP Semiconductors
TDA18214
Silicon tuner for digital terrestrial and cable TV reception
[1]
The maximum allowed ambient temperature T
amb(max)
depends on the assembly conditions of the package and especially on the design
of the Printed-Circuit Board (PCB) and die connection. The application mounting must be done in such a way that the maximum junction
temperature is never exceeded. The junction temperature can be obtained by reading the temperature sensor bit via I
2
C-bus. The
junction temperature: T
j
= T
amb
+
T
j-c
. where
T
j-c
= power
R
th
.
Class III: 500 V to 1000 V.
[2]
7. Abbreviations
Table 4.
Acronym
AGC
BOM
FCDM
GPO
H3H5
HBM
IF
I/O
LC-VCO
LIF
LNA
LO
LTE
LTO
PLD
PLL
RF
RoHS
SAW
STB
STO
VCO
Xtal
WLAN
Abbreviations
Description
Automatic Gain Control
Bill Of Material
Field-induced Charged-Device Model
General Purpose Outputs
Harmonic 3 and Harmonic 5
Human Body Model
Intermediate Frequency
Input/Output
Inductors and Capacitors - Voltage Controlled Oscillator
Low IF
Low-Noise Amplifier
Local Oscillator
Long-Term Evolution
Loop-Through Output
Power Level Detector
Phase-Locked Loop
Radio Frequency
Restriction of Hazardous Substances
Surface Acoustic Wave
Set-Top Box
Slave Tuner Output
Voltage Controlled Oscillator
Crystal
Wireless Local Area Network
8. Revision history
Table 5.
Revision history
Release date
20130211
20120713
Data sheet status
Product short data sheet
Change notice
-
Supersedes
TDA18214_SDS v.1
-
Document ID
TDA18214_SDS v.2
TDA18214_SDS v.1
Preliminary short data sheet -
TDA18214_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 2 — 11 February 2013
5 of 8
Embedded System
京公网安备 11010802033920号
EEWORLD
