74LVC1G14GW,125 datasheet, PDF

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74LVC1G14GW,125: DescriptionInverter Schmitt Trigger 1-Element CMOS 5-Pin TSSOP T/R; File Size277KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC1G14GW,125 Overview

Inverter Schmitt Trigger 1-Element CMOS 5-Pin TSSOP T/R

74LVC1G14GW,125 Parametric

Parameter Name	Attribute value
EU restricts the use of certain hazardous substances	Compliant
ECCN (US)	EAR99
Part Status	Active
HTS	8542.39.00.01
SVHC	Yes
Logic Family	LVC
Logic Function	Inverter Schmitt Trigger
Number of Elements per Chip	1
Maximum Propagation Delay Time @ Maximum CL (ns)	3.2(Typ)@2.7V\|2.2(Typ)@5V\|3(Typ)@3.3V
Absolute Propagation Delay Time (ns)	14
Process Technology	CMOS
Output Type	Schmitt Trigger
Maximum Low Level Output Current (mA)	32
Maximum High Level Output Current (mA)	-32
Minimum High Level Output Voltage (V)	0.95
Maximum Low Level Output Voltage (V)	0.8
Minimum Operating Supply Voltage (V)	1.65
Typical Operating Supply Voltage (V)	1.8\|2.5\|3.3\|5
Maximum Operating Supply Voltage (V)	5.5
Typical Quiescent Current (uA)	0.1
Maximum Quiescent Current (uA)	4
Propagation Delay Test Condition (pF)	50
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	125
Packaging	Tape and Reel
Pin Count	5
Supplier Package	TSSOP
Standard Package Name	SOP
Mounting	Surface Mount
Package Height	1(Max)
Package Length	2.25(Max)
Package Width	1.35(Max)
PCB changed	5
Lead Shape	Gull-wing

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74LVC1G14

Rev. 16 — 3 May 2021

Single Schmitt-trigger inverter

Product data sheet

1. General description

The 74LVC1G14 is a single inverter with Schmitt-trigger inputs. Inputs can be driven from either

3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and

5 V environments. This device is fully specified for partial power down applications using I

OFF

. The

OFF

circuitry disables the output, preventing the potentially damaging backflow current through the

device when it is powered down.

2. Features and benefits

•

Wide supply voltage range from 1.65 V to 5.5 V

Overvoltage tolerant inputs to 5.5 V

High noise immunity

CMOS low power dissipation

OFF

circuitry provides partial Power-down mode operation

±24 mA output drive (V

= 3.0 V)

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Unlimited rise and fall times

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

•

JESD8-5 (2.3 V to 2.7 V)

•

JESD8C (2.7 V to 3.6 V)

•

JESD36 (4.5 V to 5.5 V)

ESD protection:

•

HBM: ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2000 V

•

MM: JESD22-A115-A exceeds 200 V

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C.

•

3. Applications

•

Wave and pulse shaper

Astable multivibrator

Monostable multivibrator

74LVC1G14GW,125 Related Products

	74LVC1G14GW,125
Description	Inverter Schmitt Trigger 1-Element CMOS 5-Pin TSSOP T/R
EU restricts the use of certain hazardous substances	Compliant
ECCN (US)	EAR99
Part Status	Active
HTS	8542.39.00.01
SVHC	Yes
Logic Family	LVC
Logic Function	Inverter Schmitt Trigger
Number of Elements per Chip	1
Maximum Propagation Delay Time @ Maximum CL (ns)	3.2(Typ)@2.7V\|2.2(Typ)@5V\|3(Typ)@3.3V
Absolute Propagation Delay Time (ns)	14
Process Technology	CMOS
Output Type	Schmitt Trigger
Maximum Low Level Output Current (mA)	32
Maximum High Level Output Current (mA)	-32
Minimum High Level Output Voltage (V)	0.95
Maximum Low Level Output Voltage (V)	0.8
Minimum Operating Supply Voltage (V)	1.65
Typical Operating Supply Voltage (V)	1.8\|2.5\|3.3\|5
Maximum Operating Supply Voltage (V)	5.5
Typical Quiescent Current (uA)	0.1
Maximum Quiescent Current (uA)	4
Propagation Delay Test Condition (pF)	50
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	125
Packaging	Tape and Reel
Pin Count	5
Supplier Package	TSSOP
Standard Package Name	SOP
Mounting	Surface Mount
Package Height	1(Max)
Package Length	2.25(Max)
Package Width	1.35(Max)
PCB changed	5
Lead Shape	Gull-wing

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