BUK9Y40-55B
N-channel TrenchMOS logic level FET
Rev. 03 — 22 February 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using NXP High-Performance Automotive (HPA) TrenchMOS technology. This
product has been designed and qualified to the appropriate AEC standard for use in
automotive critical applications.
1.2 Features
175
°C
rated
Q101 compliant
Logic level compatible
Very low on-state resistance
1.3 Applications
12 V and 24 V loads
General purpose power switching
Automotive systems
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
I
D
P
tot
R
DSon
Quick reference
Conditions
V
GS
= 5 V; T
mb
= 25
°C;
see
Figure 1
and
4
T
mb
= 25
°C;
see
Figure 2
V
GS
= 5 V; I
D
= 15 A;
T
j
= 25
°C;
see
Figure 12
and
13
Min
-
-
-
Typ
-
-
34
Max
26
59
40
Unit
A
W
mΩ
drain current
total power dissipation
drain-source on-state
resistance
Symbol Parameter
Static characteristics
Avalanche ruggedness
E
DS(AL)S
non-repetitive
I
D
= 26 A; V
sup
≤
55 V;
drain-source avalanche R
GS
= 50
Ω;
V
GS
= 5 V;
energy
T
j(init)
= 25
°C;
unclamped
-
-
36
mJ
NXP Semiconductors
BUK9Y40-55B
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
mb
Pinning
Symbol
S
S
S
G
D
Description
source
source
source
gate
mounting base;
connected to drain
mbb076
Simplified outline
mb
Graphic symbol
D
G
S
1 2 3 4
SOT669 (LFPAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9Y40-55B
LFPAK
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads
Version
SOT669
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
I
D
= 26 A; V
sup
≤
55 V; R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25
°C;
unclamped
see
Figure 3
[1][2]
[3]
Conditions
T
j
≥
25
°C;
T
j
≤
175
°C
R
GS
= 20 kΩ
T
mb
= 100
°C;
V
GS
= 5 V; see
Figure 1
T
mb
= 25
°C;
V
GS
= 5 V; see
Figure 1
and
4
T
mb
= 25
°C;
t
p
≤
10
μs;
pulsed; see
Figure 4
T
mb
= 25
°C;
see
Figure 2
Min
-
-
-15
-
-
-
-
-55
-55
-
Max
55
55
15
18
26
106
59
175
175
36
Unit
V
V
V
A
A
A
W
°C
°C
mJ
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source avalanche
energy
E
DS(AL)R
repetitive drain-source
avalanche energy
Source-drain diode
I
S
I
SM
[1]
[2]
[3]
-
-
J
source current
peak source current
T
mb
= 25
°C
t
p
≤
10
μs;
pulsed; T
mb
= 25
°C
-
-
26
106
A
A
Single-pulse avalanche rating limited by maximum junction temperature of 175
°C.
Repetitive avalanche rating limited by average junction temperature of 170
°C.
Refer to application note AN10273 for further information.
© NXP B.V. 2008. All rights reserved.
BUK9Y40-55B_3
Product data sheet
Rev. 03 — 22 February 2008
2 of 12
NXP Semiconductors
BUK9Y40-55B
N-channel TrenchMOS logic level FET
30
I
D
(A)
20
03nn93
120
P
der
(%)
80
03na19
10
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
P
tot
P
tot
(25°C )
200
V
GS
5V
P
der
=
× 100 %
Fig 1. Continuous drain current as a function of
mounting base temperature
10
2
I
AV
(A)
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
03np80
(1)
10
(2)
1
(3)
10
−1
10
−2
10
−3
10
−2
10
−1
1
t
AV
(ms)
10
(1) Single pulse;T
j
= 25
°C.
(2) Single pulse;T
j
= 150
°C.
(3) Repetitive.
Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period
BUK9Y40-55B_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2008
3 of 12
NXP Semiconductors
BUK9Y40-55B
N-channel TrenchMOS logic level FET
10
3
I
D
(A)
10
2
03nn94
Limit R
DSon
= V
DS
/ I
D
t
p
= 10
μs
10
100
μs
1
DC
10
-1
1
10
V
DS
(V)
1 ms
10 ms
100 ms
10
2
T
mb
= 25
°C; I
DM
is single pulse
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
Conditions
see
Figure 5
Min
-
Typ
-
Max
2.5
Unit
K/W
10
Z
th (j-mb)
(K/W)
δ
= 0.5
0.2
0.1
10
-1
0.05
0.02
single shot
10
-2
10
-6
t
p
T
P
03nn95
1
δ
=
t
p
T
t
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration
BUK9Y40-55B_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2008
4 of 12
NXP Semiconductors
BUK9Y40-55B
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V;
T
j
= 25
°C
I
D
= 0.25 mA; V
GS
= 0 V;
T
j
= -55
°C
V
GS(th)
gate-source threshold I
D
= 1 mA; V
DS
= V
GS
;
voltage
T
j
= 175
°C;
see
Figure 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25
°C;
see
Figure 11
I
D
= 1 mA; V
DS
= V
GS
;
T
j
= -55
°C;
see
Figure 11
I
DSS
drain leakage current
V
DS
= 55 V; V
GS
= 0 V; T
j
= 25
°C
V
DS
= 55 V; V
GS
= 0 V;
T
j
= 175
°C
I
GSS
gate leakage current
V
DS
= 0 V; V
GS
= 15 V; T
j
= 25
°C
V
DS
= 0 V; V
GS
= -15 V;
T
j
= 25
°C
R
DSon
drain-source on-state
resistance
V
GS
= 5 V; I
D
= 15 A; T
j
= 175
°C;
see
Figure 12
and
13
V
GS
= 10 V; I
D
= 15 A; T
j
= 25
°C
V
GS
= 4.5 V; I
D
= 15 A; T
j
= 25
°C
V
GS
= 5 V; I
D
= 15 A; T
j
= 25
°C;
see
Figure 12
and
13
Source-drain diode
V
SD
t
rr
Q
r
source-drain voltage
I
S
= 20 A; V
GS
= 0 V; T
j
= 25
°C;
see
Figure 16
-
-
-
0.85
45
25
1.2
-
-
V
ns
nC
Min
55
50
0.5
1.1
-
-
-
-
-
-
-
-
-
Typ
-
-
-
1.5
-
0.02
-
2
2
-
32
-
34
Max
-
-
-
2
2.3
1
500
100
100
84
36
45
40
Unit
V
V
V
V
V
μA
μA
nA
nA
mΩ
mΩ
mΩ
mΩ
Static characteristics
reverse recovery time I
S
= 20 A; dI
S
/dt = -100 A/μs;
V
GS
= -10 V; V
DS
= 30 V;
recovered charge
T
j
= 25
°C
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz; T
j
= 25
°C;
see
Figure 15
I
D
= 15 A; V
DS
= 44 V; V
GS
= 5 V;
T
j
= 25
°C;
see
Figure 14
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
-
-
-
-
-
-
-
-
-
-
11
2
5
765
123
71
17
93
35
72
-
-
-
1020
148
97
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
DS
= 30 V; R
L
= 2.2
Ω;
V
GS
= 5 V; R
G(ext)
= 10
Ω;
T
j
= 25
°C
BUK9Y40-55B_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2008
5 of 12
Microcontroller MCU
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