ICS662M-02LFTR datasheet, PDF - EEWORLD Datasheet

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ICS662M-02LFTR: DescriptionPLL Based Clock Driver, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8; Categorylogic logic; File Size98KB，6 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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ICS662M-02LFTR Overview

PLL Based Clock Driver, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8

ICS662M-02LFTR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	8
Actual output times	1
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm

ICS662M-02LFTR Preview

ICS662-02

NTSC/PAL A

UDIO

LOCK

Description

The ICS662-02 is a low cost, low jitter, high

performance PLL clock synthesizer designed to

replace oscillators and PLL circuits in set-top box and

multimedia systems. Using ICS’ patented analog

Phase Locked Loop (PLL) techniques, the device uses

a NTSC/PAL reference clock input to produce a

selectable audio clock.

ICS manufactures the largest variety of Set-Top Box

and multimedia clock synthesizers for all applications.

Consult ICS to eliminate VCXOs, crystals and

oscillators from your board.

Features

•

Packaged in 8 pin SOIC

Locks to NTSC and PAL colorburst frequencies (4x)

Audio sampling rate outputs

Low synthesis error in all clocks

All frequencies are frequency locked

Advanced, low power, sub-micron CMOS process

Operating voltage of 3.3 V

Block Diagram

VDD

OE/PD

S2:0 3

REF CLK

PLL Clock

Synthesis and

Control

Circuitry

Audio Clock

GND

MDS 662-02 A

In tegrat ed Cir cuit Syste m s

525 R ace Str eet, S an Jose, CA 9 5126

Revision 100803

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ICS662-02

NTSC/PAL A

UDIO

LOCK

Pin Assignment

REF

VDD

GND

OE/PD

CLK

LOCK

UTPUT

ELECT

ABLE

Input

Frequency

14.31818

17.73447205*

Output

Frequency

8.192

11.2896

12.288

24.576

8.192

11.2896

12.288

24.576

Video

Std.

NTSC

PAL

8 pin (150 mil) SOIC

* -0.16 ppm compared to PAL specification

Pin Descriptions

Number Name

REF

VDD

GND

CLK

OE/PD

Type

Input

Power

Input

Output

Input

Reference clock input.

Connect to +3.3 V.

Connect to ground.

Pin Description

Output frequency selection Pin 2. Determines output frequency as per

table above.

Clock output per table above.

Output frequency selection Pin 1. Determines output frequency as per

table above.

Output enable. Powers down PLL and tri-states output with weak

pull-down when low.

Output frequency selection Pin 0. Determines output frequency as per

table above.

MDS 662-02 A

Int egrated C ircui t S ystems

525 Ra ce S tre et, Sa n Jose, C A 951 26

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ICS662-02

NTSC/PAL A

UDIO

LOCK

External Components

Decoupling Capacitor

As with any high performance mixed-signal IC, the

ICS662-02 must be isolated from system power supply

noise to perform optimally.

A decoupling capacitor of 0.01µF must be connected

between VDD and GND on pins 2 and 3. It must be

connected close to the ICS662-02 to minimize lead

inductance. No external power supply filtering is

required for the ICS662-02.

Series Termination Resistor

A 33

terminating resistor can be used next to the

clock outputs for trace lengths over one inch.

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the ICS662-02. These ratings,

which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of

the device at these or any other conditions above those indicated in the operational sections of the

specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can

affect product reliability. Electrical parameters are guaranteed only over the recommended operating

temperature range.

Item

Supply Voltage, VDD

All Inputs and Outputs

Ambient Operating Temperature

Storage Temperature

Soldering Temperature

-0.5 V to 4 V

Rating

-0.5 V to VDD+0.5 V

0 to +70

-65 to +150

260

Recommended Operation Conditions

Parameter

Ambient Operating Temperature

Power Supply Voltage (measured in respect to GND)

Min.

+3.0

Typ.

Max.

+70

+3.6

Units

MDS 662-02 A

Int egrated C ircui t S ystems

525 Ra ce S tre et, Sa n Jose, C A 951 26

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ICS662-02

NTSC/PAL A

UDIO

LOCK

DC Electrical Characteristics

VDD=3.3 V ±10%

, Ambient temperature 0 to +70

C, unless stated otherwise

Parameter

Operating Voltage

Supply Current

Symbol

VDD

IDD

Conditions

No Load,

OE/PD=1,

first 4 modes

No Load,

OE/PD=1,

last 4 modes

Min.

3.0

Typ.

Max.

3.6

Units

IDDPD

Input High Voltage

Input Low Voltage

Input High Voltage

Input Low Voltage

Output High Voltage

Output Low Voltage

Output High Voltage, CMOS level

Short Circuit Current

Input Capacitance

Nominal Output Impedance

Internal pull-up resistor

OUT

No load,

OE/PDTS=0

OE/PD pin only VDD - 0.5

OE/PD pin only

S2:S0, REF

pins

S2:S0, REF

pins

= -12 mA

= 12 mA

= -4 mA

CLK outputs

VDD-0.4

2.4

2.0

125

0.5

0.8

0.4

+50

S2 pin

S1, S0 OE/PD

510

120

240

Internal pull-down resistor

CLK pin

AC Electrical Characteristics

VDD = 3.3 V ±10%,

Ambient Temperature 0 to +70

C, unless stated otherwise

Parameter

Input Crystal or Clock Frequency

Frequency Synthesis Error

Output Clock Rise Time

Output Clock Fall Time

Symbol

Conditions

NTSC Clocks

PAL Clocks

Min.

-0.16

Typ.

Max.

1.5

Units

MHz

ppm

20% to 80%, Note 1

80% to 20%, Note 1

MDS 662-02 A

Int egrated C ircui t S ystems

525 Ra ce S tre et, Sa n Jose, C A 951 26

Revision 100803

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ICS662-02

NTSC/PAL A

UDIO

LOCK

Parameter

Output Clock Duty Cycle

Maximum Absolute Jitter, short

term

Maximum Absolute Jitter, long term

Note 1: Measured with 15 pF load.

Symbol

Conditions

at VDD/2, Note 1

Deviation from mean,

Note 1

Deviation from mean,

Note 1, 10

s delay

Min.

Typ.

±100

±400

Max.

Units

Thermal Characteristics

Parameter

Thermal Resistance Junction to

Ambient

Symbol

Conditions

Still air

1 m/s air flow

3 m/s air flow

Min.

Typ.

150

140

120

Max. Units

C/W

Thermal Resistance Junction to Case

MDS 662-02 A

Int egrated C ircui t S ystems

525 Ra ce S tre et, Sa n Jose, C A 951 26

Revision 100803

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ICS662M-02LFTR Related Products

	ICS662M-02LFTR	ICS662M-02LF
Description	PLL Based Clock Driver, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	SOIC	SOIC
package instruction	SOP,	SOP,
Contacts	8	8
Reach Compliance Code	compliant	compliant
Input adjustment	STANDARD	STANDARD
JESD-30 code	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e3	e3
length	4.9 mm	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Humidity sensitivity level	1	1
Number of functions	1	1
Number of terminals	8	8
Actual output times	1	1
Maximum operating temperature	70 °C	70 °C
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	30	30
width	3.9 mm	3.9 mm

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