ICS662-02
NTSC/PAL A
UDIO
C
LOCK
Description
The ICS662-02 is a low cost, low jitter, high
performance PLL clock synthesizer designed to
replace oscillators and PLL circuits in set-top box and
multimedia systems. Using ICS’ patented analog
Phase Locked Loop (PLL) techniques, the device uses
a NTSC/PAL reference clock input to produce a
selectable audio clock.
ICS manufactures the largest variety of Set-Top Box
and multimedia clock synthesizers for all applications.
Consult ICS to eliminate VCXOs, crystals and
oscillators from your board.
Features
•
•
•
•
•
•
•
Packaged in 8 pin SOIC
Locks to NTSC and PAL colorburst frequencies (4x)
Audio sampling rate outputs
Low synthesis error in all clocks
All frequencies are frequency locked
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V
Block Diagram
VDD
OE/PD
S2:0 3
REF CLK
PLL Clock
Synthesis and
Control
Circuitry
Audio Clock
GND
MDS 662-02 A
In tegrat ed Cir cuit Syste m s
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525 R ace Str eet, S an Jose, CA 9 5126
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Revision 100803
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ICS662-02
NTSC/PAL A
UDIO
C
LOCK
Pin Assignment
REF
VDD
GND
S2
1
2
3
4
8
7
6
5
S0
OE/PD
S1
CLK
C
LOCK
O
UTPUT
S
ELECT
T
ABLE
S2
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
Input
Frequency
14.31818
14.31818
14.31818
14.31818
17.73447205*
17.73447205*
17.73447205*
17.73447205*
Output
Frequency
8.192
11.2896
12.288
24.576
8.192
11.2896
12.288
24.576
Video
Std.
NTSC
NTSC
NTSC
NTSC
PAL
PAL
PAL
PAL
8 pin (150 mil) SOIC
* -0.16 ppm compared to PAL specification
Pin Descriptions
Pin
Pin
Number Name
1
2
3
4
5
6
7
8
REF
VDD
GND
S2
CLK
S1
OE/PD
S0
Pin
Type
Input
Power
Power
Input
Output
Input
Input
Input
Reference clock input.
Connect to +3.3 V.
Connect to ground.
Pin Description
Output frequency selection Pin 2. Determines output frequency as per
table above.
Clock output per table above.
Output frequency selection Pin 1. Determines output frequency as per
table above.
Output enable. Powers down PLL and tri-states output with weak
pull-down when low.
Output frequency selection Pin 0. Determines output frequency as per
table above.
MDS 662-02 A
Int egrated C ircui t S ystems
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2
525 Ra ce S tre et, Sa n Jose, C A 951 26
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Revision 100803
t el (408) 295-9 800
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ICS662-02
NTSC/PAL A
UDIO
C
LOCK
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS662-02 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the ICS662-02 to minimize lead
inductance. No external power supply filtering is
required for the ICS662-02.
Series Termination Resistor
A 33
W
terminating resistor can be used next to the
clock outputs for trace lengths over one inch.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS662-02. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
-0.5 V to 4 V
Rating
-0.5 V to VDD+0.5 V
0 to +70
°
C
-65 to +150
°
C
260
°
C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.0
Typ.
Max.
+70
+3.6
Units
°
C
V
MDS 662-02 A
Int egrated C ircui t S ystems
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525 Ra ce S tre et, Sa n Jose, C A 951 26
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Revision 100803
t el (408) 295-9 800
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ICS662-02
NTSC/PAL A
UDIO
C
LOCK
DC Electrical Characteristics
VDD=3.3 V ±10%
, Ambient temperature 0 to +70
°
C, unless stated otherwise
Parameter
Operating Voltage
Supply Current
Symbol
VDD
IDD
Conditions
No Load,
OE/PD=1,
first 4 modes
No Load,
OE/PD=1,
last 4 modes
Min.
3.0
Typ.
20
Max.
3.6
Units
V
mA
25
mA
IDDPD
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage, CMOS level
Short Circuit Current
Input Capacitance
Nominal Output Impedance
Internal pull-up resistor
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
I
OS
C
IN
Z
OUT
R
PU
R
PD
No load,
OE/PDTS=0
OE/PD pin only VDD - 0.5
OE/PD pin only
S2:S0, REF
pins
S2:S0, REF
pins
I
OH
= -12 mA
I
OL
= 12 mA
I
OH
= -4 mA
CLK outputs
VDD-0.4
2.4
2.0
125
m
A
V
0.5
V
V
0.8
V
V
0.4
V
V
mA
pF
+50
5
20
W
k
W
k
W
k
W
S2 pin
S1, S0 OE/PD
510
120
240
Internal pull-down resistor
CLK pin
AC Electrical Characteristics
VDD = 3.3 V ±10%,
Ambient Temperature 0 to +70
°
C, unless stated otherwise
Parameter
Input Crystal or Clock Frequency
Frequency Synthesis Error
Output Clock Rise Time
Output Clock Fall Time
Symbol
F
IN
Conditions
NTSC Clocks
PAL Clocks
Min.
10
-0.16
Typ.
Max.
20
0
1.5
1.5
Units
MHz
ppm
ppm
ns
ns
t
OR
t
OF
20% to 80%, Note 1
80% to 20%, Note 1
MDS 662-02 A
Int egrated C ircui t S ystems
l
4
525 Ra ce S tre et, Sa n Jose, C A 951 26
l
Revision 100803
t el (408) 295-9 800
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ww w. ic s t .c o m
ICS662-02
NTSC/PAL A
UDIO
C
LOCK
Parameter
Output Clock Duty Cycle
Maximum Absolute Jitter, short
term
Maximum Absolute Jitter, long term
Note 1: Measured with 15 pF load.
Symbol
Conditions
at VDD/2, Note 1
Deviation from mean,
Note 1
Deviation from mean,
Note 1, 10
m
s delay
Min.
45
Typ.
±100
±400
Max.
55
Units
%
ps
ps
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
q
JA
q
JA
q
JA
q
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
150
140
120
40
Max. Units
°
C/W
°
C/W
°
C/W
°
C/W
Thermal Resistance Junction to Case
MDS 662-02 A
Int egrated C ircui t S ystems
l
5
525 Ra ce S tre et, Sa n Jose, C A 951 26
l
Revision 100803
t el (408) 295-9 800
l
ww w. ic s t .c o m
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