5962R9678601QWX datasheet, PDF

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5962R9678601QWX: DescriptionCMOS TO TTL TRANSCEIVER, TRUE OUTPUT, CDIP22, CERAMIC, DIP-22; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size43KB，3 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962R9678601QWX Overview

CMOS TO TTL TRANSCEIVER, TRUE OUTPUT, CDIP22, CERAMIC, DIP-22

5962R9678601QWX Parametric

Parameter Name	Attribute value
Maker	Renesas Electronics Corporation
Parts packaging code	DIP
package instruction	DIP,
Contacts	22
Reach Compliance Code	unknown
ECCN code	EAR99
maximum delay	50 ns
Interface integrated circuit type	CMOS TO TTL TRANSCEIVER
JESD-30 code	R-CDIP-T22
JESD-609 code	e4
Number of digits	8
Number of functions	1
Number of terminals	22
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output latch or register	NONE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class Q
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
Supply voltage 1-max	10.5 V
Mains voltage 1-minute	9.5 V
Supply voltage1-Nom	10 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal location	DUAL
total dose	100k Rad(Si) V

5962R9678601QWX Preview

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OMM lication intersil.c

NO R tral App ntapp@

Data Sheet

l Cen mail: ce

Cal or e

HS-3374RH

August 2000

File Number

3038.2

Radiation Hardened 8-Bit Bidirectional

CMOS/TTL Level Converter

[ /Title

(HS-

3374R

/Sub-

ject

(Radia-

tion

Hard-

ened 8-

Bit

Bidi-

rec-

tional

CMOS

/TTL

Level

Con-

verter)

/Autho

r ()

/Key-

words

(Inter-

sil

Corpo-

ration,

semi-

con-

ductor,

Radia-

tion

Hard-

ened,

RH,

Rad

Hard,

QML,

The Intersil HS-3374RH is a radiation hardened 8-bit

bidirectional level converter designed to interface CMOS

logic levels with TTL logic levels in radiation hardened bus

oriented systems. The HS-3374RH is fabricated using a

radiation hardened EPI-CMOS process and features eight

parallel bidirectional buffer/level converters.

Two control inputs, ENABLE and DISABLE, are used to

determine the direction of data ﬂow, and to set both the in

puts and outputs in the high impedance state. The control

inputs may be driven by either TTL or CMOS logic drivers

capable of sinking one standard TTL load.

The HS-3374RH is a non-inverting version of the industry

standard CD40116. The non-inverting outputs of the

HS-3374RH reduce PC board chip count by eliminating the

need to restore data back to a non-inverted format.

Speciﬁcations for Rad Hard QML devices are controlled

by the Defense Supply Center in Columbus (DSCC). The

SMD numbers listed here must be used when ordering.

Detailed Electrical Speciﬁcations for these devices are

contained in SMD 5962-96786. A “hot-link” is provided

on our homepage for downloading.

www.intersil.com/spacedefense/space.asp

Features

• Electrically Screened to SMD # 5962-96786

• QML Qualiﬁed per MIL-PRF-38535 Requirements

• Radiation Hardened EPI-CMOS

- Total Dose. . . . . . . . . . . . . . . . . . . . . . . 1 x 10

RAD(Si)

- Latch-Up Immune . . . . . . . >1 x 10

RAD(Si)/s (Note 1)

• Low Propagation Delay Time

- Typical CMOS to TTL Pre-RAD . . . . . . . . . . . . . . . 40ns

- Typical CMOS to TTL Post 100KRAD. . . . . . . . . . . 40ns

- Typical TTL to CMOS Pre-RAD . . . . . . . . . . . . . . . 50ns

- Typical TTL to CMOS Post 100KRAD. . . . . . . . . . . 50ns

• Low Standby Power

• +10V CMOS and +5V TTL Power Supply Inputs

• Eight Non-Inverting Three-State Input/Output Channels

• No External TTL Input Pull-Up Resistors Required

• High TTL Sink Current

• Equivalent to Sandia SA2996

• Military Temperature Range . . . . . . . . . . . . -55

C to 125

NOTE:

1. For operation at 10V and transient levels above

1 x 10

RAD(Si)/s, please refer to Application Note 401.

Ordering Information

ORDERING NUMBER

5962R9678601QWC

5962R9678601VWC

INTERNAL

MKT. NUMBER

HS1-3374RH-8

HS1-3374RH-Q

TEMP. RANGE

(

-55 to 125

Pinout

HS-3374RH

MIL-STD-1835, CDIP2-T22

(SBDIP)

TOP VIEW

VDD

22 VCC

21 B0

20 B1

19 B2

18 B3

17 B4

16 B5

15 B6

14 B7

13 DISABLE

12 NC

TTL

INPUT/OUTPUT

Functional Diagram

DISABLE

VDD = 1

VCC = 22

GND = 11

CMOS

INPUT/OUTPUT

CMOS

IN/OUT

2-9

LEVEL

SHIFTER

TTL

OUT (IN)

14-21

ENABLE 10

GND 11

ENABLE

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Intersil Corporation 2000

HS-3374RH

Functional Block Diagram

1 OF 8 IDENTICAL CIRCUITS

VDD

VCC

2 (3, 4, 5, 6, 7, 8, 9)

A1 CMOS

INPUT (OUTPUT)

LEVEL

SHIFTER

21 (20, 19,

18, 17, 16,

15, 14)

ENABLE

GND

B1 TTL

OUTPUT

(INPUT)

VCC

DISABLE

LEVEL

SHIFTER

VDD

GND

LEVEL

SHIFTER

NOTES:

2. Enable and disable are TTL type inputs

3. D and E outputs are common to all 8 channels

INPUT (OUTPUT)

TERMINAL

NUMBER

OUTPUT (INPUT)

TERMINAL

NUMBER

ENABLE

DISABLE

TRUTH TABLE

FUNCTION

Convert CMOS Level to TTL Level

Convert TTL Level to CMOS Level

High Impedance (Z)

DATA

0 = Low Level 1 = High Level X = Don’t Care

Z = High Impedance on Both CMOS and TTL sides.

NOTE: An important caveat that is applicable to CMOS devices in

general is that unused inputs should never be left ﬂoating. This rule

applies to inputs connected to a three-state bus. The need for

external pull-up resistors during three-state bus conditions is

eliminated by the presence of regenerative latches on the following

HS-3374RH pins: A0 - 7.

The functional block diagram depicts one of these pins with the

regenerative latch. When the CMOS driver assumes the high

impedance state, the latch holds the bus in whatever logic state

(high or low) it was before the three-state condition. A transient

drive current of

±1.5mA

at VDD/2

±0.5V

for 10ns is required to

switch the latch. Thus, CMOS device inputs connected to the bus

are not allowed to float during three-state conditions.

WARNING: Do not activate the Disable input by hardwiring to any

TTL input pins. This is an incorrect mode of operation.

HS-3374RH

Die Characteristics

DIE DIMENSIONS:

89.4 mils x 76.0 mils x 14 mils

±1

mil

INTERFACE MATERIALS:

Glassivation:

Type: SiO2

Thickness: 11k

±2k

Top Metallization:

Type: AlSi

Thickness: 8k

±1k

Substrate:

Radiation Hardened Silicon Gate,

Dielectric Isolation

Backside Finish:

Silicon

ASSEMBLY RELATED INFORMATION:

Substrate Potential:

Unbiased (DI)

Metallization Mask Layout

HS-3374RH

(22) VCC

(1) VDD

(21) B0

(3) A1

(2) A0

(20) B1

A2 (4)

(19) B2

A3 (5)

(18) B3

A4 (6)

(17) B4

A5 (7)

(16) B5

A6 (8)

(15) B6

A7 (9)

(14) B7

All Intersil semiconductor products are manufactured, assembled and tested under

ISO9000

quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site

www.intersil.com

DISABLE (13)

ENABLE (10)

GND (11)

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5962R9678601QWX Related Products

	5962R9678601QWX	5962R9678601VWX
Description	CMOS TO TTL TRANSCEIVER, TRUE OUTPUT, CDIP22, CERAMIC, DIP-22	CMOS TO TTL TRANSCEIVER, TRUE OUTPUT, CDIP22, CERAMIC, DIP-22
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation
Parts packaging code	DIP	DIP
package instruction	DIP,	DIP,
Contacts	22	22
Reach Compliance Code	unknown	unknown
ECCN code	EAR99	EAR99
maximum delay	50 ns	50 ns
Interface integrated circuit type	CMOS TO TTL TRANSCEIVER	CMOS TO TTL TRANSCEIVER
JESD-30 code	R-CDIP-T22	R-CDIP-T22
JESD-609 code	e4	e4
Number of digits	8	8
Number of functions	1	1
Number of terminals	22	22
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE
Output latch or register	NONE	NONE
Output polarity	TRUE	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DIP
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE
Certification status	Not Qualified	Not Qualified
Filter level	MIL-PRF-38535 Class Q	MIL-PRF-38535 Class V
Maximum supply voltage	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V
Supply voltage 1-max	10.5 V	10.5 V
Mains voltage 1-minute	9.5 V	9.5 V
Supply voltage1-Nom	10 V	10 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal surface	GOLD	GOLD
Terminal form	THROUGH-HOLE	THROUGH-HOLE
Terminal location	DUAL	DUAL
total dose	100k Rad(Si) V	100k Rad(Si) V

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