MC68306PV16 datasheet, PDF - EEWORLD Datasheet

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MC68306PV16: Description32-BIT, 16.67MHz, MICROPROCESSOR, PQFP144, PLASTIC, TQFP-144; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，191 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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MC68306PV16 Overview

32-BIT, 16.67MHz, MICROPROCESSOR, PQFP144, PLASTIC, TQFP-144

MC68306PV16 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	NXP
Parts packaging code	QFP
package instruction	QFP, QFP144,.87SQ,20
Contacts	144
Reach Compliance Code	unknown
ECCN code	EAR99
Address bus width	24
bit size	32
boundary scan	YES
maximum clock frequency	4 MHz
External data bus width	16
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-PQFP-G144
low power mode	NO
Humidity sensitivity level	1
Number of terminals	144
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP144,.87SQ,20
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
speed	16.67 MHz
Maximum slew rate	100 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

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Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc...

MC68306

Integrated EC000 Processor

User’s Manual

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different

applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not

convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems

intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola

product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or

unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims,

costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such

unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and

are

registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

TABLE OF CONTENTS

Paragraph

Number

Title

Section 1

Introduction

Page

Number

Freescale Semiconductor, Inc...

1.1 MC68EC000 Core processor.................................................................................. 1-2

1.2 On-Chip Peripherals ............................................................................................... 1-3

1.2.1 Serial Module ....................................................................................................... 1-3

1.2.2 DRAM Controller .................................................................................................. 1-4

1.2.3 Chip Selects......................................................................................................... 1-4

1.2.4 Parallel Ports........................................................................................................ 1-4

1.2.5 Interrupt Controller ............................................................................................... 1-4

1.2.6 Clock .................................................................................................................... 1-5

1.2.7 Bus Timeout Monitor ............................................................................................ 1-5

1.2.8 Mode Controller ................................................................................................... 1-5

1.2.9 IEEE 1149.1 Test................................................................................................. 1-5

Section 2

Signal Descriptions

2.1 Bus Signals ............................................................................................................. 2-5

2.1.1 Address Bus (A23–A1) ........................................................................................ 2-5

2.1.2 Address Strobe (AS) ............................................................................................ 2-5

2.1.3 Bus Error (BERR ) ................................................................................................ 2-5

2.1.4 Bus Request (BR) ................................................................................................ 2-5

2.1.5 Bus Grant (BG ) .................................................................................................... 2-6

2.1.6 Bus Grant Acknowledge (BGACK) ....................................................................... 2-6

2.1.7 Data Bus (D15–D0) ............................................................................................. 2-6

2.1.8 Data Transfer Acknowledge (DTACK) ................................................................. 2-6

2.1.9 DRAM Multiplexed Address Bus (DRAMA14 –DRAMA0) ..................................... 2-6

2.1.10 Processor Function Codes (FC2–FC0).............................................................. 2-6

2.1.11 Halt (HALT) ........................................................................................................ 2-7

2.1.12 Read/Write (R/W) ............................................................................................... 2-7

2.1.13 Upper And Lower Data Strobes (UDS ,

LDS

) ..................................................... 2-7

2.1.14 Upper Byte Write (UW ) ...................................................................................... 2-8

2.1.15 Lower Byte Write (LW )....................................................................................... 2-8

2.1.16 Output Enable (OE) ........................................................................................... 2-8

2.1.17 Reset (RESET ) .................................................................................................. 2-8

2.2 Chip Select Signals................................................................................................. 2-9

MOTOROLA

MC68306 USER'S MANUAL

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

TABLE OF CONTENTS (Continued)

Paragraph

Number

Title

Page

Number

2.3 DRAM Controller Signals........................................................................................ 2-9

2.3.1 Column Address Strobe (CAS1–

CAS0

)............................................................... 2-9

2.3.2 Row Address Strobe (RAS1 –RAS0) .................................................................... 2-9

2.3.3 DRAM Write Signal (DRAMW) ............................................................................. 2-9

2.4 Interrupt Control and Parallel Port Signals ............................................................. 2-9

2.4.1 Interrupt Request (IRQ7–IRQ1) ........................................................................... 2-9

2.4.2 Interrupt Acknowledge (IACK7–IACK1) ............................................................... 2-9

2.4.3 Port A Signals (PA7–PA0) ................................................................................... 2-9

2.4.4 Port B (PB7–PB0) ................................................................................................ 2-9

2.5 Clock and Mode Control Signals ............................................................................ 2-10

2.5.1 Crystal Oscillator (EXTAL, XTAL) ........................................................................ 2-10

2.5.2 Clock Out (CLKOUT) ........................................................................................... 2-10

2.5.3 Address Mode (AMODE) ..................................................................................... 2-10

2.6 Serial Module Signals ............................................................................................. 2-10

2.6.1 Channel A Receiver Serial-Data Input (RxDA) .................................................... 2-10

2.6.2 Channel A Transmitter Serial-Data Output (TxDA) ............................................. 2-10

2.6.3 Channel B Receiver Serial-Data Input (RxDB) .................................................... 2-10

2.6.4 Channel B Transmitter Serial-Data Output (TxDB) ............................................. 2-10

2.6.5 CTSA ................................................................................................................... 2-11

2.6.6 RTSA ................................................................................................................... 2-11

2.6.7 CTSB ................................................................................................................... 2-11

2.6.8 RTSB ................................................................................................................... 2-11

2.6.9 Crystal Oscillator (X1, X2) ................................................................................... 2-11

2.6.10 IP2 ..................................................................................................................... 2-11

2.6.11 OP3 ................................................................................................................... 2-11

2.7 JTAG Port Test Signals .......................................................................................... 2-11

2.7.1 Test Clock (TCK) ................................................................................................. 2-12

2.7.2 Test Mode Select (TMS)...................................................................................... 2-12

2.7.3 Test Data In (TDI) ................................................................................................ 2-12

2.7.4 Test Data Out (TDO) ........................................................................................... 2-12

2.7.5 Test Reset (TRST) .............................................................................................. 2-12

Section 3

68000 Bus Operation Description

3.1 Data Transfer Operations ....................................................................................... 3-1

3.1.1 Read Cycle .......................................................................................................... 3-1

3.1.2 Write Cycle .......................................................................................................... 3-4

3.1.3 Read-Modify-Write Cycle..................................................................................... 3-7

3.1.4 CPU Space Cycle ................................................................................................ 3-11

Freescale Semiconductor, Inc...

MC68306 USER'S MANUAL

For More Information On This Product,

Go to: www.freescale.com

MOTOROLA

MC68306PV16 Related Products

	MC68306PV16	MC68306FC16
Description	32-BIT, 16.67MHz, MICROPROCESSOR, PQFP144, PLASTIC, TQFP-144	IC,MICROPROCESSOR,32-BIT,CMOS,QFP,132PIN,PLASTIC
Is it Rohs certified?	incompatible	incompatible
Maker	NXP	NXP
Parts packaging code	QFP	QFP
package instruction	QFP, QFP144,.87SQ,20	BQFP, SPQFP132,1.1SQ
Contacts	144	132
Reach Compliance Code	unknown	unknown
ECCN code	EAR99	EAR99
Address bus width	24	24
bit size	32	32
boundary scan	YES	YES
maximum clock frequency	4 MHz	4 MHz
External data bus width	16	16
Format	FIXED POINT	FIXED POINT
Integrated cache	NO	NO
JESD-30 code	S-PQFP-G144	S-PQFP-G132
low power mode	NO	NO
Humidity sensitivity level	1	1
Number of terminals	144	132
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QFP	BQFP
Encapsulate equivalent code	QFP144,.87SQ,20	SPQFP132,1.1SQ
Package shape	SQUARE	SQUARE
Package form	FLATPACK	FLATPACK, BUMPER
Peak Reflow Temperature (Celsius)	225	225
power supply	5 V	5 V
Certification status	Not Qualified	Not Qualified
speed	16.67 MHz	16.67 MHz
Maximum slew rate	100 mA	100 mA
Maximum supply voltage	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.635 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR

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