21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT807T
PI49FCT2807T
Fast CMOS Clock Driver
Features
•
•
•
•
•
•
Guaranteed low skew: 0.25ns
Low input capacitance
Minimum duty cycle distortion
1:10 fanout
High speed: 3.5ns propagation delay
TTL input and CMOS output compatible
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
•
Industrial Operation at -40ºC to +85ºC
•
Packaging (Pb-free & Green available):
– 20-pin 300-mil wide SOIC (S)
– 20-pin 150-mil wide QSOP (Q)
– 20-pin 209-mil wde SSOP (H)
Description
Pericom Semiconductor’s PI49FCT807T and PI49FCT2807T clock
drivers feature one input and ten outputs. The large fanout from a
single input line reduces loading on input clock. TTL level outputs
reduce noise levels on the part. Typical applications are clock and
signal distribution.
The PI49FCT2807T also features a 25-ohm on-chip resistor for
lower noise.
Pin Configuration
A
GND
B
0
V
CC
B
1
GND
B
2
V
CC
B
3
GND
Block Diagram
1
2
3
20
19
18
V
CC
B
9
B
8
GND
B
7
V
CC
B
6
GND
B
5
B
4
A
B
5
B
6
B
4
B
3
B
1
B
2
B
0
4
20-Pin
17
5
H, Q, R
16
6
7
8
9
10
15
14
13
12
11
Pin Description
Pin Name
A
B0 – B9
GND
V
CC
Input
Outputs
Ground
Power
De s cription
B
7
B
8
B
9
1
PS7008D
09/24/04
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT807/2807T
Fast CMOS Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................... –65°C to +150°C
Ambient Temperature with Power Applied ............................ -40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) .. –0.5V to +7.0V
DC Input Voltage .................................................................. –0.5V to +7.0V
DC Output Current ............................................................................. 120mA
Power Dissipation .................................................................................. 0.5W
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%)
Parameters Description
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OS
I
OFF
V
H
Output HIGH Voltage
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Input HIGH Current
Clamp Diode Voltage
Short Circuit Current
Power Down Disable
Input Hysteresis
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
IN
=V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
V
CC
= Max.
(3)
, V
OUT
= GND
V
CC
= GND, V
OUT
= 4.5V
–60
—
–0.7
–120
—
150
V
IN
= 2.7V
V
IN
= 0.5V
I
OH
= –15.0mA
I
OH
= 48.0mA
I
OL
= 12mA(25Ω)
2.0
0.8
1
–1
20
–1.2
–225
100
Min.
2.4
Typ.
(2)
3.3
0.2
0.2
Max.
0.5
0.5
Units
V
V
V
V
V
µA
µA
µA
V
mA
µA
m
V
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6.0
8
Max.
10
12
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
2
PS7008D
09/24/04
PI49FCT807/2807T
Fast CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Power Supply Characteristics
Parameters Description
I
CC
∆
I
CC
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max.,
V
CC
= Max., Outputs Open
50% Duty Cycle,
One Input Toggling
V
CC
= Max., Outputs Open
f
CP
= 50 MH
Z
,
50% Duty Cycle
V
IN
= GND
or Vcc
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
Min.
Typ.
(2)
3
0.5
0.4
Max.
30
1.5
0.6
Units
µA
mA
mA/
MHz
mA
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
Total Power Supply
Current
(6)
I
CCD
I
C
20
20.7
30
(5)
33
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
Switching Characteristics over Operating Range
807/2807T
Com.
807AT
Com.
Min.
Max.
807BT
Com.
Min.
Max.
807CT
Com.
Min.
Max. Units
Parameters
t
PLH
t
PHL
t
SK(o)
t
SK(p)
Description
Propagation Delay
A
TO
B
N
Skew between two outputs
of same package
(3)
Skew between opposite
transitions of same
output (|t
PHL
— t
PLH
|)
(3)
Skew between outputs of
different package at same
power supply, temperature
and speed grade
(3)
Conditions
C
L
= 50pF
R
L
= 500Ω
(1)
Min.
Max.
1.5
—
—
4.5
0.5
0.5
1.5
—
—
4.0
0.5
0.5
1.5
—
—
3.8
0.35
0.35
1.5
—
—
3.5
0.25
0.35
ns
ns
ns
t
SK(t)
—
1.0
—
1.0
—
0.75
—
0.75
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
3
PS7008D
09/24/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT807/2807T
Fast CMOS Clock Driver
Tests Circuits For All Outputs
(1)
V
CC
7.0V
Switch Position
Test
Open Drain
Disable LOW
Enable LOW
All Other Inputs
Switch
Closed
Open
500Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500Ω
V
OUT
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Switching Waveforms
Propagation Delay
3V
Input
t
PLH
Output
t
R
t
PHL
2.0V
0.5V
Pulse Skew – t
SK
(p)
3V
Input
t
PLH
Output
t
PHL
V
OH
1.5V
V
OL
t
SK(p)
=
t
PHL
• t
PLH
1.5V
0V
1.5V
0V
V
OH
1.5V
V
OL
t
F
Output Skew – t
SK
(o)
3V
Input
t
PLHx
Ox
t
SK(o)
Oy
t
PLHy
t
PHLy
t
SK(o)
V
OH
1.5V
V
OL
Package 2
Output
t
PLH2
t
PHL2
Package Skew – t
SK
(t)
3V
Input
t
PLH1
Package 1
Output
t
SK(t)
t
SK(t)
V
OH
1.5V
V
OL
t
PHL1
V
OH
1.5V
V
OL
1.5V
0V
1.5V
0V
t
PHLx
V
OH
1.5V
V
OL
t
SK(o)
=
t
PLHy
• t
PLHx
or
t
PHLy
• t
PHLx
t
SK(t)
=
t
PLH2
• t
PLH1
or
t
PHL2
• t
PHL1
4
PS7008D
09/24/04
PI49FCT807/2807T
Fast CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Packaging Mechanical: 20-Pin 209-Mil SSOP (H)
20
.197
.220
5.00
5.60
1
.272
.295
6.90
7.50
.078
2.00
Max
SEATING
PLANE
.002
Min
0.050
.004
.009
0.09
0.25
0.55 .022
0.95 .037
.291
.322
7.40
8.20
.0256
BSC
0.65
.0098
Max.
0.25
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Packaging Mechanical: 20-Pin 150-Mil QSOP (Q)
20
.008
0.20
MIN.
.150
.157
3.81
3.99
Guage Plane
.008
.013
0.20
0.33
.010
0.254
1
.337 8.56
.344 8.74
Detail A
.016
.035
0.41
0.89
.041
1.04
REF
0˚-6˚
.058
REF
1.47
.053 1.35
.069 1.75
SEATING
PLANE
.015 x 45˚
0.38
Detail A
.007
.010
.016
.050
0.41
1.27
0.178
0.254
.025
BSC
0.635
.004 0.101
.010 0.254
.008 0.203
.012 0.305
.228
.244
5.79
6.19
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
5
PS7008D
09/24/04