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3.3 V, Full-Duplex, 840 µA,
20 Mbps, EIA RS-485 Transceiver
ADM3491
FEATURES
Operates with 3.3 V supply
EIA RS-422 and RS-485 compliant over full CM range
19 kΩ input impedance
Up to 50 transceivers on bus
20 Mbps data rate
Short circuit protection
Specified over full temperature range
Thermal shutdown
Interoperable with 5 V logic
840 µA supply current
2 nA shutdown current
Also available in TSSOP package
Meets IEC1000-4-4 (>1 kV)
8 ns skew
Upgrade for MAX 3491, SN75ALS180
FUNCTIONAL BLOCK DIAGRAM
ADM3491
A
RO
R
B
RE
DE
Z
DI
D
Y
05234-001
Figure 1.
APPLICATIONS
Telecommunications
DTE–DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
AppleTalk
Industrial controls
The ADM3491 is intended for balanced data transmission and
complies with both EIA Standards RS-485 and RS-422. It
contains a differential line driver and a differential line receiver,
making it suitable for full-duplex data transfer.
The input impedance is 19 kΩ, allowing up to 50 transceivers to
be connected on the bus. Excessive power dissipation caused by
bus contention or by output shorting is prevented by a thermal
shutdown circuit. This feature forces the driver output into a
high impedance state, if a significant temperature increase is
detected in the internal driver circuitry during fault conditions.
The receiver contains a fail-safe feature that results in a logic
high output state, if the inputs are unconnected (floating).
The ADM3491 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology.
The ADM3491 is fully specified over the industrial temperature
range and is available in DIP and SOIC packages, as well as the
space-saving TSSOP package.
GENERAL DESCRIPTION
The ADM3491 is a low power, differential line transceiver
designed to operate using a single 3.3 V power supply. Low
power consumption, coupled with a shutdown mode, makes it
ideal for power-sensitive applications. It is suitable for commu-
nication on multipoint bus transmission lines.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADM3491
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test Circuits....................................................................................... 7
Switching Characteristics ................................................................ 8
Typical Performance Characteristics ..............................................9
Applications Information .............................................................. 11
Differential Data Transmission ................................................ 11
Cable and Data Rate................................................................... 11
Receiver Open-Circuit Fail-Safe Feature ................................ 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
11/04—Rev. 0 to Rev. A
Format Updated..................................................................Universal
Changes to Specifications Section.................................................. 3
Changes to Ordering Guide .......................................................... 13
1/98—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADM3491
SPECIFICATIONS
V
CC
= 3.3 V ± 0.3 V. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Output Voltage, V
OD
Min
2.0
1.5
1.5
0.2
3
0.2
0.8
2.0
±1.0
±3
±250
−0.2
12
50
19
1
−0.8
±1
0.4
V
CC
– 0.4 V
±60
±1.0
+0.2
Typ
Max
Unit
V
V
V
V
V
V
V
V
µA
µA
mA
V
mV
kΩ
mA
mA
µA
V
V
mA
µA
Test Conditions/Comments
RL = 100 Ω, Figure 4, V
CC
> 3.1 V
RL = 54 Ω, Figure 4
RL = 60 Ω, Figure 5, −7 V < V
TST
< +12 V
R = 54 Ω or 100 Ω, Figure 4
R = 54 Ω or 100 Ω, Figure 4
R = 54 Ω or 100 Ω, Figure 4
∆|V
OD
| for Complementary Output States
Common-Mode Output Voltage, V
OC
∆|V
OC
| for Complementary Output States
CMOS Input Logic Threshold Low, V
INL
CMOS Input Logic Threshold High, V
INH
Logic Input Current (DE, DI, RE)
Output Leakage (Y, Z) Current
Output Short-Circuit Current
RECEIVER
Differential Input Threshold Voltage, V
TH
Input Voltage Hysteresis, ∆V
TH
Input Resistance
Input Current (A, B)
Logic Enable Input Current (RE)
Output Voltage Low, V
OL
Output Voltage High, V
OH
Short-Circuit Output Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
I
CC
V
O
= –7 V or +12 V, V
CC
= 0 V or 3.6 V
V
O
= –7 V or +12 V
−7 V < V
CM
< +12 V
V
CM
= 0 V
−7 V < V
CM
< +12 V
V
IN
= 12 V
V
IN
= −7 V
I
OUT
= 2.5 mA
I
OUT
= −1.5 mA
V
OUT
= GND or V
CC
V
CC
= 3.6 V, 0 V < V
OUT
< V
CC
Outputs unloaded
DE = V
CC
, RE = 0 V
DE = 0 V, RE = 0 V
DE = 0 V, RE = V
CC
Supply Current in Shutdown
0.84
0.84
0.002
1.5
1.5
1
mA
mA
µA
Rev. A | Page 3 of 16
ADM3491
TIMING SPECIFICATIONS
V
CC
= 3.3 V, T
A
= 25°C.
Table 2.
Parameter
DRIVER
Differential Output Delay, T
DD
Differential Output Transition Time
Propagation Delay Input to Output, T
PLH
, T
PHL
Driver Output to Output, T
SKEW
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown
Propagation Delay Input to Output, T
PLH
, T
PHL
Skew, T
PLH
– T
PHL
Receiver Enable, T
EN
Receiver Disable, T
DEN
Receiver Enable from Shutdown
Min
1
1
7
Typ
Max
35
15
35
8
90
80
110
300
90
10
50
45
500
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/ Comments
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF, Figure 8
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF, Figure 8
R
L
= 27 Ω, C
L1
= C
L2
= 15 pF, Figure 9
R
L
= 54 Ω, C
L1
= C
L2
= 15 pF, Figure 9
R
L
= 110 Ω, C
L
= 50 pF, Figure 6
R
L
= 110 Ω, C
L
= 50 pF, Figure 6
R
L
= 110 Ω, C
L
= 15 pF, Figure 6
8
22
45
40
650
80
25
190
65
25
25
C
L
= 15 pF, Figure 11
C
L
= 15 pF, Figure 11
C
L
= 15 pF, Figure 7
C
L
= 15 pF, Figure 7
C
L
= 15 pF, Figure 7
V
CC
= 3.3 V ± 0.3 V, T
A
= T
MIN
to T
MAX
.
Table 3.
Parameter
DRIVER
Differential Output Delay, T
DD
Differential Output Transition Time
Propagation Delay Input to Output, T
PLH
, T
PHL
Driver Output to Output, T
SKEW
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown
Propagation Delay Input to Output, T
PLH
, T
PHL
Skew, T
PLH
– T
PHL
Receiver Enable, T
EN
Receiver Disable, T
DEN
Receiver Enable from Shutdown
Min
1
2
7
Typ
Max
70
15
70
10
110
110
110
500
115
20
50
50
600
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/ Comments
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF, Figure 8
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF, Figure 8
R
L
= 27 Ω, C
L1
= C
L2
= 15 pF, Figure 9
R
L
= 54 Ω, C
L1
= C
L2
= 15 pF, Figure 9
R
L
= 110 Ω, C
L
= 50 pF, Figure 6
R
L
= 110 Ω, C
L
= 50 pF, Figure 6
R
L
= 110 Ω, C
L
= 15 pF, Figure 6
8
22
45
40
650
50
25
190
65
25
25
C
L
= 15 pF, Figure 11
C
L
= 15 pF, Figure 11
C
L
= 15 pF, Figure 7
C
L
= 15 pF, Figure 7
C
L
= 15 pF, Figure 7
Rev. A | Page 4 of 16
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