NB100LVEP221FAR2G datasheet, PDF

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NB100LVEP221FAR2G: DescriptionIC 100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, LQFP-52, Clock Driver; Categorylogic logic; File Size167KB，12 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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NB100LVEP221FAR2G Overview

IC 100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, LQFP-52, Clock Driver

NB100LVEP221FAR2G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	QFP
package instruction	HLQFP, QFP52,.47SQ
Contacts	52
Reach Compliance Code	compliant
Other features	NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V
series	100LVE
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52
length	10 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	2
Number of functions	1
Number of inverted outputs
Number of terminals	52
Actual output times	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HLQFP
Encapsulate equivalent code	QFP52,.47SQ
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE
Peak Reflow Temperature (Celsius)	235
power supply	-2.5/-3.3/2.5/3.3 V
Prop。Delay @ Nom-Sup	0.8 ns
propagation delay (tpd)	0.71 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.05 ns
Maximum seat height	1.7 mm
Maximum supply voltage (Vsup)	3.8 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	ECL
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm

NB100LVEP221FAR2G Preview

NB100LVEP221

2.5V/3.3V 1:20 Differential

HSTL/ECL/PECL Clock Driver

Description

The NB100LVEP221 is a low skew 1-to-20 differential clock

driver, designed with clock distribution in mind, accepting two clock

sources into an input multiplexer. The two clock inputs are differential

ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The

LVPECL input signals can be either differential configuration or

single-ended (if the V

output is used).

The LVEP221 specifically guarantees low output-to-output skew.

Optimal design, layout, and processing minimize skew within a device

and from device to device.

To ensure tightest skew, both sides of differential outputs should be

terminated identically into 50

even if only one output is being used.

If an output pair is unused, both outputs may be left open

(unterminated) without affecting skew.

The NB100LVEP221, as with most other ECL devices, can be

operated from a positive V

supply in LVPECL mode. This allows the

LVEP221 to be used for high performance clock distribution in +3.3 V or

+2.5 V systems. In a PECL environment, series or Thevenin line

terminations are typically used as they require no additional power

supplies. For more information on PECL terminations, designers should

refer to Application Note AND8020/D.

The V

pin, an internally generated voltage supply, is available to this

device only. For single- ended LVPECL input conditions, the unused

differential input is connected to V

as a switching reference voltage.

may also rebias AC coupled inputs. When used, decouple V

and

via a 0.01

capacitor and limit current sourcing or sinking to

0.5 mA. When not used, V

should be left open.

Single- ended CLK input operation is limited to a V

≥

3.0 V in

LVPECL mode, or V

≤

-3.0 V in NECL mode.

Features

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MARKING

DIAGRAM*

NB100

LVEP221

AWLYYWWG

LQFP-52

FA SUFFIX

CASE 848H

NB100

LVEP221

AWLYYWWG

QFN-52

MN SUFFIX

CASE 485M

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb-Free Package

•

*For additional marking information, refer to

Application Note AND8002/D.

15 ps Typical Output-to-Output Skew

40 ps Typical Device-to- Device Skew

Jitter Less than 2 ps RMS

Maximum Frequency > 1.0 GHz Typical

Thermally Enhanced 52-Lead LQFP and QFN

Output

540 ps Typical Propagation Delay

LVPECL and HSTL Mode Operating Range:

= 2.375 V to 3.8 V with V

= 0 V

NECL Mode Operating Range:

= 0 V with V

= -2.375 V to -3.8 V

Q Output will Default Low with Inputs Open or at V

Pin Compatible with Motorola MC100EP221

Pb-Free Packages are Available*

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

*For additional information on our Pb-Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2007

June, 2007 - Rev. 8

Publication Order Number:

NB100LVEP221/D

NB100LVEP221

CC0

Q12

Q13

Q14

Q15

Q16

Q17

CC0

Q18

Q10

Q11

Q19

Q11

Q18

CC0

NB100LVEP221

CLK0

CLKSEL

CLK1

CC0

All V

, V

CCO

, and V

pins must be externally connected to appropriate Power Supply to guarantee proper operation. The thermally

conductive exposed pad on package bottom (see package case drawing) must be attached to a heat-sinking conduit, capable of

transferring 1.2 Watts. This exposed pad is electrically connected to V

internally.

Figure 1. 52-Lead LQFP Pinout

(Top View)

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Q19

NB100LVEP221

VCC0

Exposed Pad (EP)

VCC0

VCC

CLKSEL

CLK0

VBB

CLK1

VEE

Q19

Q18

Q10

Q11

VCC0

NB100LVEP221

Q12

VCC0

Q17

Q16

Q15

Q14

Q13

Figure 2. 52-Lead QFN Pinout

(Top View)

Table 1. PIN DESCRIPTION

CLK0*, CLK0**

CLK1*, CLK1**

Q0:19, Q0:19

CLK_SEL*

CCO

EE***

FUNCTION

ECL/PECL Differential Inputs

ECL/PECL or HSTL Differential Inputs

ECL/PECL Differential Outputs

ECL/PECL Active Clock Select Input

Reference Voltage Output

Positive Supply

Negative Supply

CLK1

CLK_SEL

Active Input

CLK0, CLK0

CLK1, CLK1

CLK1

CLK0

Q0 - Q19

* Pins will default LOW when left open.

** Pins will default HIGH when left open.

*** The thermally conductive exposed pad on the bottom of the

package is electrically connected to V

internally.

Table 2. FUNCTION TABLE

CLK_SEL

Figure 3. Logic Diagram

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Q12

Q17

Q16

NB100LVEP221

Table 3. ATTRIBUTES

Characteristics

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

Human Body Model

Machine Model

Charged Device Model

Pb Pkg

Level 2

Value

75 kW

37.5 kW

> 2 kV

> 200 V

> 2 kV

Pb-Free Pkg

Level 3

Level 2

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

LQFP-52

QFN-52

Flammability Rating

Transistor Count

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, refer to Application Note AND8003/D.

Oxygen Index: 28 to 34

UL 94 V-0 @ 0.125 in

533 Devices

Table 4. MAXIMUM RATINGS

Symbol

out

stg

sol

Parameter

PECL Mode Power Supply

NECL Mode Power Supply

PECL Mode Input Voltage

NECL Mode Input Voltage

Output Current

Sink/Source

Operating Temperature Range

Storage Temperature Range

Thermal Resistance (Junction-to-Ambient)

(See Application Information)

Thermal Resistance (Junction-to-Case)

(See Application Information)

Thermal Resistance (Junction-to-Ambient)

(Note )

Thermal Resistance (Junction-to-Case) (Note )

Wave Solder

Pb-Free

0 lfpm

500 lfpm

0 lfpm

500 lfpm

0 lfpm

500 lfpm

2S2P

LQFP-52

QFN-52

Condition 1

= 0 V

Continuous

Surge

≤

≥

Condition 2

Rating

-6

100

0.5

-40 to +85

-65 to +150

35.6

3.2

6.4

19.6

265

Unit

°C

°C/W

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

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NB100LVEP221

Table 5. LVPECL DC CHARACTERISTICS

= 2.5 V; V

= 0 V (Note 2)

-40

°C

Symbol

IHCMR

Characteristic

Power Supply Current

Output HIGH Voltage (Note 3)

Output LOW Voltage (Note 3)

Input HIGH Voltage (Single-Ended) (Note 4)

Input LOW Voltage (Single-Ended) (Note 4)

Input HIGH Voltage Common Mode Range

(Differential Configuration) (Note 5)

CLK0/CLK0

CLK1/CLK1

Input HIGH Current

Input LOW Current

CLK

0.5

-150

Min

100

1355

555

1335

555

Typ

125

1480

680

Max

150

1605

900

1620

900

Min

104

1355

555

1335

555

25°C

Typ

130

1480

680

Max

156

1605

900

1620

900

Min

116

1355

555

1275

555

85°C

Typ

145

1480

680

Max

174

1605

900

1620

900

Unit

1.2

0.3

2.5

1.6

150

1.2

0.3

2.5

1.6

150

1.2

0.3

2.5

1.6

150

0.5

-150

0.5

-150

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification

limit values are applied individually under normal operating conditions and not valid simultaneously.

2. Input and output parameters vary 1:1 with V

. V

can vary + 0.125 V to -1.3 V.

3. All outputs loaded with 50

to V

- 2.0 V.

4. Do not use V

at V

< 3.0 V.

5. V

IHCMR

min varies 1:1 with V

, V

IHCMR

max varies 1:1 with V

. The V

IHCMR

range is referenced to the most positive side of the differen‐

tial input signal.

Table 6. LVPECL DC CHARACTERISTICS

= 3.3 V; V

= 0 V (Note 6)

-40

°C

Symbol

IHCMR

Characteristic

Power Supply Current

Output HIGH Voltage (Note 7)

Output LOW Voltage (Note 7)

Input HIGH Voltage (Single-Ended)

Input LOW Voltage (Single-Ended)

Output Reference Voltage (Note 8)

Input HIGH Voltage Common Mode Range

(Differential Configuration) (Note 9)

CLK0/CLK0

CLK1/CLK1

Input HIGH Current

Input LOW Current

CLK

0.5

-150

Min

100

2155

1355

2135

1355

1775

1875

Typ

125

2280

1480

Max

150

2405

1700

2420

1700

1975

Min

104

2155

1355

2135

1355

1775

1875

25°C

Typ

130

2280

1480

Max

156

2405

1700

2420

1700

1975

Min

116

2155

1355

2135

1355

1775

1875

85°C

Typ

145

2280

1480

Max

174

2405

1700

2420

1700

1975

Unit

1.2

0.3

3.3

1.6

150

1.2

0.3

3.3

1.6

150

1.2

0.3

3.3

1.6

150

0.5

-150

0.5

-150

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

6. Input and output parameters vary 1:1 with V

. V

can vary + 0.925 V to -0.5 V.

7. All outputs loaded with 50

to V

- 2.0 V.

8. Single-ended input operation is limited V

≥

3.0 V in LVPECL mode.

9. V

IHCMR

min varies 1:1 with V

, V

IHCMR

max varies 1:1 with V

. The V

IHCMR

range is referenced to the most positive side of the differential

input signal.

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NB100LVEP221FAR2G Related Products

	NB100LVEP221FAR2G	NB100LVEP221MNR2G
Description	IC 100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, LQFP-52, Clock Driver	100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC52, 8 X 8 MM, LEAD FREE, QFN-52
Is it Rohs certified?	conform to	conform to
Maker	ON Semiconductor	ON Semiconductor
Parts packaging code	QFP	QFN
package instruction	HLQFP, QFP52,.47SQ	HVQCCN, LCC52,.31SQ,20
Contacts	52	52
Reach Compliance Code	compliant	compliant
Other features	NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V	NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V
series	100LVE	100LVE
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52	S-XQCC-N52
length	10 mm	8 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Number of functions	1	1
Number of terminals	52	52
Actual output times	20	20
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	UNSPECIFIED
encapsulated code	HLQFP	HVQCCN
Encapsulate equivalent code	QFP52,.47SQ	LCC52,.31SQ,20
Package shape	SQUARE	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
power supply	-2.5/-3.3/2.5/3.3 V	-2.5/-3.3/2.5/3.3 V
Prop。Delay @ Nom-Sup	0.8 ns	0.8 ns
propagation delay (tpd)	0.71 ns	0.71 ns
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.05 ns	0.05 ns
Maximum seat height	1.7 mm	1 mm
Maximum supply voltage (Vsup)	3.8 V	3.8 V
Minimum supply voltage (Vsup)	2.375 V	2.375 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V
surface mount	YES	YES
technology	ECL	ECL
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	NO LEAD
Terminal pitch	0.65 mm	0.5 mm
Terminal location	QUAD	QUAD
width	10 mm	8 mm

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