FAN73611 — Single-Channel High-Side Gate Drive IC
July 2010
FAN73611
Single-Channel High-Side Gate Drive IC
Features
Floating Channel for Bootstrap Operation to +600V
250mA/500mA Sourcing/Sinking Current Driving
Description
The FAN73611 is a monolithic high-side gate drive IC
that can drive MOSFETs and IGBTs operating up to
+600V. Fairchild’s high-voltage process and common-
mode noise canceling techniques provide stable opera-
tion of the high-side driver under high dv/dt noise circum-
stances. An advanced level-shift circuit offers high-side
gate driver operation up to V
S
=-9.8V (typical) for
V
BS
=15V. The UVLO circuits prevents malfunction when
V
DD
or V
BS
is lower than the specified threshold voltage.
The output drivers typically source/sink 250mA/500mA;
respectively, which is suitable for Plasma Display Panel
(PDP) application, motor drive inverter, and switching
mode power supply applications.
8-SOP
Capability
Common-Mode dv/dt Noise-Canceling Circuit
3.3V and 5V Input Logic Compatible
Output In Phase with Input Signal
Under-Voltage Lockout for V
DD
and V
BS
8-Lead Small Outline Package (SOP)
Applications
High-Speed Gate Driver
Plasma Display Panel
Switching-Mode Power Supply (SMPS)
Motor Drive Inverter
Ordering Information
Part Number
FAN73611M
(1)
FAN73611MX
(1)
Package
8-Lead, Small-Outline Package (SOP)
Operating
Temperature Range
-40°C ~ 125°C
Packing Method
Tube
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2010 Fairchild Semiconductor Corporation
FAN73611 • Rev. 1.0.0
www.fairchildsemi.com
FAN73611 — Single-Channel High-Side Gate Drive IC
Typical Application Diagrams
15V
R
BOOT
D
BOOT
V
IN
FAN73611
1 V
DD
PWM
C1
V
B
8
R1
2 IN
3 NC
4 GND
HO 7
C
BOOT
R2
L1
V
S
6
NC 5
D1
C2
V
OUT
FAN73611 Rev.01
Figure 1. Step-Down (Buck) DC-DC Converter Application
Internal Block Diagram
V
DD
1
UVLO
PULSE
GENERATOR
UVLO
Shoot-through current
compensated gate driver
8
V
B
IN
GND
2
100K
NOISE
CANCELLER
R
S
R
Q
7
HO
4
Pin 3 and 5 are no connection.
6
V
S
FAN73611 Rev.02
Figure 2. Functional Block Diagram
© 2010 Fairchild Semiconductor Corporation
FAN73611 • Rev. 1.0.0
2
www.fairchildsemi.com
FAN73611 — Single-Channel High-Side Gate Drive IC
Pin Configuration
V
DD
IN
NC
GND
1
2
8
7
V
B
HO
V
S
NC
FAN73611
3
4
6
5
FAN73611 Rev.01
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
V
DD
IN
NC
GND
NC
V
S
HO
V
B
Supply Voltage
Description
Logic Input for High-Side Gate Driver Output
No Connection
Ground
No Connection
High-Voltage Floating Supply Return
High-Side Driver Output
High-Side Floating Supply
© 2010 Fairchild Semiconductor Corporation
FAN73611 • Rev. 1.0.0
3
www.fairchildsemi.com
FAN73611 — Single-Channel High-Side Gate Drive IC
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
A
=25°C unless otherwise specified.
Symbol
V
S
V
B
V
HO
V
DD
V
IN
dV
S
/dt
P
D
JA
T
J
T
STG
Characteristics
High-Side Floating Offset Voltage
High-Side Floating Supply Voltage
High-Side Floating Output Voltage
Low-Side and Logic Supply Voltage
Logic Input Voltage
Allowable Offset Voltage Slew Rate
Power Dissipation
(2, 3, 4)
Thermal Resistance
Junction Temperature
Storage Temperature
Min.
V
B
-25
-0.3
V
S
-0.3
-0.3
-0.3
Max.
V
B
+0.3
625.0
V
B
+0.3
25.0
V
DD
+0.3
± 50
0.625
200
Unit
V
V
V
V
V
V/ns
W
C/W
C
C
-55
-55
+150
+150
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3.
Refer to the following standards:
JESD51-2: Integrated circuits thermal test method environmental conditions, natural convection, and
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages.
4. Do not exceed power dissipation (P
D
) under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
B
V
S
V
HO
V
IN
V
DD
T
A
Parameter
High-Side Floating Supply Voltage
High-Side Floating Supply Offset Voltage
High-Side Output Voltage
Logic Input Voltage
Supply Voltage
Operating Ambient Temperature
Min.
V
S
+10
6-V
DD
V
S
GND
10
-40
Max.
V
S
+20
600
V
B
V
DD
20
+125
Unit
V
V
V
V
V
C
© 2010 Fairchild Semiconductor Corporation
FAN73611 • Rev. 1.0.0
4
www.fairchildsemi.com
FAN73611 — Single-Channel High-Side Gate Drive IC
Electrical Characteristics
V
BIAS
(V
DD
, V
BS
) = 15.0V and T
A
= 25°C unless otherwise specified. The V
IN
and I
IN
parameters are referenced to
GND. The V
O
and I
O
parameters are relative to V
S
and are applicable to the respective output HO.
Symbol
Characteristics
Test Condition
Min. Typ. Max. Unit
A
A
V
V
V
10
60
420
100
600
A
A
A
Power Supply Section
I
QDD
I
PDD
V
DDUV+
V
BSUV+
V
DDUV-
V
BSUV-
V
DDHYS
V
BSHYS
I
LK
I
QBS
I
PBS
Quiescent V
DD
Supply Current
Operating V
DD
Supply Current
V
IN
=0V or 5V, C
LOAD
=1000pF
C
LOAD
=1000pF, f
IN
=20KHz,
RMS value
7.8
7.3
80
80
8.8
8.3
0.5
140
160
9.8
9.3
V
DD
and V
BS
Supply Under-Voltage Positive
V
DD
=Sweep, V
BS
=Sweep
Going Threshold Voltage
V
DD
and V
BS
Supply Under-Voltage Nega-
tive Going Threshold Voltage
V
DD
=Sweep, V
BS
=Sweep
V
DD
and V
BS
Supply Under-Voltage Lockout
V
DD
=Sweep, V
BS
=Sweep
Hysteresis Voltage
Offset Supply Leakage Current
Quiescent V
BS
Supply Current
Operating V
BS
Supply Current
V
B
=V
S
=600V
V
IN
=0V or 5V, C
LOAD
=1000pF
C
LOAD
=1000pF, f
IN
=20KHz,
RMS Value
Input Logic Section
V
IH
V
IL
I
IN+
I
IN-
R
IN
Logic “1” Input Voltage
Logic “0” Input Voltage
Logic Input High Bias Current
Logic Input Low Bias Current
Input Pull-Down Resistance
V
IN
=5V
V
IN
=0V
60
100
50
2.5
0.8
75
2
V
V
A
A
K
Gate Driver Output Section
V
OH
V
OL
I
O+
I
O-
V
S
High Level Output Voltage (V
BIAS
- V
O
)
Low Level Output Voltage
Output High, Short-Circuit Pulsed Current
Output Low, Short-Circuit Pulsed Current
Allowable Negative V
S
Pin Voltage for IN
Signal Propagation to HO
No Load
No Load
V
HO
=0V, V
IN
=5V, PW
10µs
V
HO
=15V,V
IN
=0V, PW
10µs
V
BS
=15V
200
400
250
500
-9.8
-7.0
0.1
0.1
V
V
mA
mA
V
Dynamic Electrical Characteristics
V
DD
=V
BS
=15V, C
LOAD
=1000pF, and T
A
=25°C, unless otherwise specified.
Symbol
t
on
t
off
t
r
t
f
.
Parameter
Turn-On Propagation Delay Time
Turn-Off Propagation Delay Time
Turn-On Rise Time
Turn-Off Fall Time
V
S
=0V
V
S
=0V
Conditions
Min.
70
70
Typ.
120
120
70
30
Max.
170
170
140
60
Unit
ns
ns
ns
ns
© 2010 Fairchild Semiconductor Corporation
FAN73611 • Rev. 1.0.0
5
www.fairchildsemi.com
京公网安备 11010802033920号
EEWORLD
