HT9315AT datasheet, PDF - EEWORLD Datasheet

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HT9315AT: DescriptionTelephone Circuit, CMOS, PDIP20; CategoryWireless rf/communication Telecom circuit; File Size3MB，30 Pages; ManufacturerHoltek; Websitehttp://www.holtek.com/

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HT9315AT Overview

Telephone Circuit, CMOS, PDIP20

HT9315AT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Holtek
package instruction	DIP, DIP20(UNSPEC)
Reach Compliance Code	unknown
crystal frequency	3.58 MHz
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
Number of terminals	20
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP20(UNSPEC)
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	2.5/5 V
Certification status	Not Qualified
Maximum slew rate	2 mA
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal location	DUAL

HT9315AT Preview

HT9315/6 Series

15-Memory Tone/Pulse Dialer

Features

•

Patent Number: 64097, 86474, 113235(R.O.C.), 5424740(U.S.A.)

•

Universal specification

Operating voltage: 2.0V~5.5V

Low standby current

Low memory retention current: 0.1

µ

A (Typ.)

Tone/pulse switchable

Interface with LCD driver

32 digits for redialing

32 digits for the SA memory dialing

One-key redialing

Pause and P

→

T key for PBX

4

×

5 keyboard matrix

3.58MHz crystal or ceramic resonator

Hand-free control

Hold-line control

Pause, P

→

T can be saved for redialing

Lock function

Keytone function

Resistor options:

–

M/B ratio

–

Flash function and flash time

(86ms~600ms)

–

Pause and P

→

T duration

–

Pulse number

–

Keyboard operated IDD lock function

–

Keyboard form

General Description

The HT9315/6 series tone/pulse dialers are

CMOS LSIs for telecommunication systems. They

are designed to meet various dialing specifica-

tions through resistor option matrix.

The HT9315/6 series are offered in four differ-

ent versions. They are HT9315x/HT9316x nor-

mal version; HT9315xL/HT9315xI lock

version, with keyboard-operated IDD lock func-

t i o n ; HT9 31 5xT ke yton e ve rsi on an d

HT9315xLT/HT9315xIT keytone/lock function

version. The four versions also supply the fol-

lowing functions: Hold-line, Hand-free and

LCD dialing number display interface, all of

which are suitable for feature phone applica-

tions.

1

21st Jan ’98

HT9315/6 Series

Selection Table

Function

Item

HT9315x

HT9315A

HT9315B

HT9315C

HT9315D

HT9315xI

HT9315AI

HT9315BI

HT9315CI

HT9315DI

HT9315xL

HT9315AL

HT9315BL

HT9315CL

HT9315DL

HT9315xT

HT9315AT

HT9315BT

HT9315CT

HT9315DT

HT9315xIT

HT9315AIT

HT9315BIT

HT9315CIT

HT9315DIT

HT9315xLT

HT9315ALT

HT9315BLT

HT9315CLT

HT9315DLT

HT9316x

HT9316A

HT9316B

HT9316C

HT9316D

Hold-

Keytone Lock Function

Line

(Normal version)

—

√

—

√

—

√

—

√

—

√

18 DIP

22 SDIP

Hand-

Free

LCD

Interface

Min.

Flash

Time

Package

98 ms

20 DIP

24 SDIP

(Mechanical Lock Version)

—

Lock 0

Lock 0, 9

Lock All

—

√

—

√

—

√

—

√

—

√

98 ms

20 DIP

18 DIP

22 SDIP

24 SDIP

(Mechanical and Keyboard Operated Lock Version)

—

Lock 0

Lock 0, 9

Lock All

Keyboard-

Operated Lock

—

√

—

√

—

√

—

√

—

√

98 ms

20 DIP

24 SDIP

18 DIP

22 SDIP

(Normal Version with Keytone)

√

—

√

—

√

—

√

—

√

—

√

98 ms

22 SDIP

28 SDIP

20 DIP

24 SDIP

(Normal Version with Keytone)

√

Lock 0

Lock 0, 9

Lock All

—

√

—

√

—

√

—

√

—

√

98 ms

22 SDIP

28 SDIP

20 DIP

24 SDIP

(Mechanical and Keyboard Operated Lock with Keytone Version)

√

Lock 0

Lock 0, 9

Lock All

Keyboard-

Operated Lock

—

√

—

√

—

20 DIP

24 SDIP

98 ms

22 SDIP

28 SDIP

—

√

—

√

—

√

(Normal version)

—

√

—

√

—

√

—

√

—

√

86 ms

20 DIP

24 SDIP

18 DIP

22 SDIP

2

21st Jan ’98

HT9315/6 Series

Pin Assignment

HT9315x/xL, HT9316x version

HT9315xT/xLT versions

3

21st Jan ’98

HT9315/6 Series

Keyboard Information

Block Diagram

4

21st Jan ’98

HT9315/6 Series

Pin Description

Pin Name

I/O

Internal

Connection

Description

These pins form a 4

×

5 keyboard matrix which can perform

keyboard input detection and dialing specification setting

functions. When on-hook (HKS=high) all the pins are set high.

While off-hook the column group (C1~C5) remains low and the

row group (R1~R4) is set high for key input detection.

An inexpensive single contact 4

×

5 keyboard can be used as an

input device. Pressing a key connects a single column to a single

row, and actuates the system oscillator that results in a dialing

signal output. If more than two keys are pressed at the same

time, no response occurs. The key-in debounce time is 20ms.

Refer to the keyboard information for keyboard arrangement and

to the functional description for dialing specification selection.

C1~C5

R1~R4

I/O

CMOS

IN/OUT

X1

I

X2

O

The system oscillator consists of an inverter, a bias resistor

and the necessary load capacitor on chip. Connecting a

standard 3.579545MHz crystal or ceramic resonator to the X1

OSCILLATOR

and X2 terminals can implement the oscillator function. The

oscillator is turned off in the standby mode, and is actuated

whenever a keyboard entry is detected.

XMUTE is an NMOS open drain structure pulled to VSS

during dialing signal transmission. Otherwise, it is an open

circuit. XMUTE is used to mute the speech circuit when

transmitting the dial signal.

This pin is used to monitor the status of the hook-switch and

its combination with HFI/HDI can control the PO pin output

to make or break the line.

HKS=VDD: On-hook state (PO=low). Except for HFI/HDI

(hand-free/hold-line control input), other

functions are all disabled.

HKS=VSS: Off-hook state (PO=high). The chip is in the standby

mode and ready to receive the key input.

This is a test pin. It should be connected to VDD when in

normal operation.

This pin is a CMOS output structure which by receiving the

HKS and HFO/HDO signals, control the dialer to connect or

disconnect the telephone line.

PO outputs a low to break line when HKS is high (on-hook)

and HFO/HDO is low. PO outputs a high to make line when

HKS is low (off-hook) or HFO is high or HDO is high.

During the off-hook state, this pin also outputs the dialing

pulse train in pulse mode dialing. While in the tone mode, this

pin is always high.

XMUTE

O

NMOS OUT

HKS

I

CMOS IN

TEST

I

CMOS IN

PO

O

CMOS OUT

5

21st Jan ’98

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Description	Telephone Circuit, CMOS, PDIP20	Telephone Circuit, CMOS, PDIP24	Telephone Circuit, CMOS, PDIP20	Telephone Circuit, CMOS, PDIP24	Telephone Circuit, CMOS, PDIP22	Telephone Circuit, CMOS, PDIP22	Telephone Circuit, CMOS, PDIP28
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Holtek	Holtek	Holtek	Holtek	Holtek	Holtek	Holtek
package instruction	DIP, DIP20(UNSPEC)	SDIP, SDIP24(UNSPEC)	DIP, DIP20(UNSPEC)	SDIP, SDIP24(UNSPEC)	DIP, DIP22(UNSPEC)	DIP, DIP22(UNSPEC)	DIP, DIP28(UNSPEC)
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
crystal frequency	3.58 MHz	3.58 MHz	3.58 MHz	3.58 MHz	3.58 MHz	3.58 MHz	3.58 MHz
JESD-30 code	R-PDIP-T20	R-PDIP-T24	R-PDIP-T20	R-PDIP-T24	R-PDIP-T22	R-PDIP-T22	R-PDIP-T28
JESD-609 code	e0	e0	e0	e0	e0	e0	e0
Number of terminals	20	24	20	24	22	22	28
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Minimum operating temperature	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SDIP	DIP	SDIP	DIP	DIP	DIP
Encapsulate equivalent code	DIP20(UNSPEC)	SDIP24(UNSPEC)	DIP20(UNSPEC)	SDIP24(UNSPEC)	DIP22(UNSPEC)	DIP22(UNSPEC)	DIP28(UNSPEC)
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE, SHRINK PITCH	IN-LINE	IN-LINE, SHRINK PITCH	IN-LINE	IN-LINE	IN-LINE
power supply	2.5/5 V	2.5/5 V	2.5/5 V	2.5/5 V	2.5/5 V	2.5/5 V	2.5/5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum slew rate	2 mA	2 mA	2 mA	2 mA	2 mA	2 mA	2 mA
surface mount	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL

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Computer motherboard circuit diagram 810 1_19

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