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Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> DS1374U-18
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DS1374U-18

Description
Timer or RTC,
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size599KB，15 Pages
ManufacturerDALLAS
Websitehttp://www.dalsemi.com
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DS1374U-18 Overview

Timer or RTC,

DS1374U-18 Parametric

Parameter NameAttribute value
MakerDALLAS
Reach Compliance Codeunknown

DS1374U-18 Preview

Rev 0; 8/03
2-Wire, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
General Description
The DS1374 is a 32-bit binary counter designed to con-
tinuously count time in seconds. An additional counter
generates a periodic alarm or serves as a watchdog
timer. If disabled, this counter can be used as 3 bytes
of nonvolatile (NV) RAM. Separate output pins are pro-
vided for an interrupt and a square wave at one of four
selectable frequencies. A precision temperature-com-
pensated reference and comparator circuit monitor the
status of V
CC
to detect power failures, provide a reset
output, and automatically switch to the backup supply
when necessary. Additionally, the reset pin is monitored
as a pushbutton input for externally generating a reset.
The device is programmed serially through a 2-wire
bidirectional bus.
Features
♦
32-Bit Binary Counter
♦
Second Binary Counter Provides Time-of-Day
Alarm, Watchdog Timer, or NV RAM
♦
Separate Square-Wave and Interrupt Output Pins
♦
2-Wire Serial Interface
♦
Automatic Power-Fail Detect and Switch Circuitry
♦
Single-Pin Pushbutton Reset Input/Open-Drain
Reset Output
♦
Low-Voltage Operation
♦
Trickle-Charge Capability
♦
-40°C to +85°C Operating Temperature Range
♦
10-Pin µSOP
DS1374
Applications
Portable Instruments
Point-of-Sale Equipment
Medical Equipment
Telecommunications
PART
DS1374U-18
DS1374U-3
DS1374U-33
Ordering Information
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
10 µSOP
10 µSOP
10 µSOP
TOP
MARK
DS1374-18
DS1374-3
DS1374-33
Typical Operating Circuit
V
CC
RPU = t
r
/C
B
V
CC
CRYSTAL
Pin Configuration
TOP VIEW
RPU RPU
V
CC
X1
SCL
CPU
INT
SDA
INT
V
BACKUP
GND
PRIMARY
BATTERY,
RECHARGEABLE
BATTERY, OR
SUPER CAPACITOR
X2
V
CC
SQW
X1
1
X2
2
3
4
5
10
V
CC
DS1374
9
8
7
6
SQW
INT
SCL
SDA
DS1374
V
BACKUP
RST
GND
RST
N.O.
PUSHBUTTON
RESET
RST
µSOP
______________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
2-Wire, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
DS1374
ABSOLUTE MAXIMUM RATINGS
Voltage on V
CC
Pin Relative to Ground.................-0.3V to +6.0V
Voltage on SDA, SCL, and WDS
Relative to Ground ....................................-0.3V to V
CC
+ 0.3V
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature Range .......See IPC/JEDEC J-STD-020A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(V
CC
= V
CC MIN
to V
CC MAX
, T
A
= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
Supply Voltage
(Notes 2, 3)
Input Logic 1
Input Logic 0
Power-Fail Voltage
(Note 2)
SYMBOL
DS1374-33
V
CC
V
IH
V
IL
DS1374-3
DS1374-18
(Note 2)
(Note 2)
DS1374-33
V
PF
DS1374-3
DS1374-18
DS1374-33
Backup Supply Voltage
(Notes 2, 3, 4)
V
BACKUP
DS1374-3
DS1374-18
CONDITIONS
MIN
2.97
2.7
1.71
0.7 V
CC
-0.3
2.70
2.45
1.51
1.3
1.3
1.3
2.88
2.6
1.6
3.0
3.0
3.0
TYP
3.3
3.0
1.8
MAX
5.50
3.3
1.89
V
CC
+ 0.3
+0.3
V
CC
2.97
2.7
1.71
V
CC
MAX
UNITS
V
V
V
V
3.7
3.7
V
2
_____________________________________________________________________
2-Wire, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
DC ELECTRICAL CHARACTERISTICS
(V
CC
= V
CC MIN
to V
CC MAX
, T
A
= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
Trickle-Charge Current-Limiting
Resistors
Input Leakage
I/O Leakage
RST
Pin I/O Leakage
SDA Logic 0 Output (V
OL
= 0.4V)
RST,
SQW, and
INT
Logic 0
Outputs (Note 11)
SYMBOL
R1
R2
R3
I
LI
I
LO
I
LORST
I
OLSDA
V
CC
> 2V; V
OL
= 0.4V
I
OL1
1.71V < V
CC
< 2V; V
OL
= 0.2 V
CC
1.3V < V
CC
< 1.71V; V
OL
= 0.2 V
CC
DS1374-18
Active Supply Current
(Notes 11, 12)
I
CCA
DS1374-3
DS1374-33
DS1374-18
Standby Current (Notes 11, 13)
V
BACKUP
Leakage Current
(V
BACKUP
= 3.7V)
I
CCS
DS1374-3
DS1374-33
I
BACKUPLKG
75
110
180
60
80
115
(Note 5)
(Note 6)
(Note 7)
(Note 8)
(Note 9)
(Note 10)
-1
-1
-200
CONDITIONS
MIN
TYP
250
2000
4000
+1
+1
+1
3.0
3.0
3.0
250
150
200
300
100
125
175
100
nA
µA
µA
mA
mA
µA
µA
Ω
MAX
UNITS
DS1374
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 0V, V
BACKUP
= 3.7V,
T
A
= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
V
BACKUP
Oscillator Current
(OSC ON); SQW OFF
V
BACKUP
Oscillator Current
(OSC ON); SQW ON (32kHz)
V
BACKUP
Data-Retention Current
(OSC OFF)
SYMBOL
I
BKOSC1
I
BKOSC2
I
BACKUPDR
(Note 14)
(Notes 14, 15)
CONDITIONS
MAX
TYP
400
600
25
MAX
700
1000
100
UNITS
nA
nA
nA
_____________________________________________________________________
3
2-Wire, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
DS1374
AC ELECTRICAL CHARACTERISTICS
(V
CC
= V
CC MIN
to V
CC MAX
, T
A
= -40°C to +85°C, unless otherwise noted.) (Note 1) (Figure 1)
PARAMETER
SCL Clock Frequency (Note 16)
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition (Note 17)
Low Period of SCL Clock
High Period of SCL Clock
Data Hold Time (Notes 17, 18)
Data Setup Time (Note 11)
Start Setup Time
Rise Time of Both SDA and SCL
Signals (Note 19)
Fall Time of Both SDA and SCL
Signals (Note 19)
Setup Time for STOP Condition
Capacitive Load for Each Bus Line
Pulse Width of Spikes That Must
be Suppressed by the Input Filter
Pushbutton Debounce
Reset Active Time
Oscillator Stop Flag (OSF) Delay
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
HD:DAT
t
SU:DAT
t
SU:STA
t
R
t
F
t
SU:STO
C
B
t
SP
PB
DB
t
RST
t
OSF
Fast mode
(Figure 2)
(Figure 2)
(Note 20)
30
250
250
100
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
CONDITIONS
MIN
100
0
1.3
4.7
0.6
4.0
1.3
4.7
0.6
4.0
0
0
100
250
0.6
4.7
20 +
0.1C
B
20 +
0.1C
B
0.6
4.7
400
300
1000
300
300
0.9
0.9
TYP
MAX
400
100
UNITS
kHz
µs
µs
µs
µs
µs
ns
µs
ns
ns
µs
pF
ns
ms
ms
ms
4
_____________________________________________________________________
2-Wire, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
POWER-UP/POWER-DOWN CHARACTERISTICS
(T
A
= -40°C to +85°C) (Figure 3)
PARAMETER
V
CC
Detect to Recognize Inputs
(V
CC
Rising)
V
CC
Fall Time; V
PF(MAX)
to
V
PF(MIN)
V
CC
Rise Time; V
PF(MIN)
to
V
PF(MAX)
SYMBOL
t
RPU
t
F
t
R
300
0
CONDITIONS
MIN
TYP
250
MAX
UNITS
ms
µs
µs
DS1374
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when the device is in write protection.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Note 19:
Limits at -40°C are guaranteed by design and not production tested.
All voltages are referenced to ground.
V
BACKUP
should not exceed V
CC
MAX or 3.7V, whichever is greater.
The use of the 250Ω trickle-charge resistor is not allowed at V
CC
> 3.63V and should not be enabled.
Measured at V
CC
= typ, V
BACKUP
= 0V, register 09h = A5h.
Measured at V
CC
= typ, V
BACKUP
= 0V, register 09h = A6h.
Measured at V
CC
= typ, V
BACKUP
= 0V, register 09h = A7h.
SCL only.
SDA and SQW and
INT.
The
RST
pin has an internal 50kΩ pullup resistor to V
CC
.
Trickle charger disabled.
I
CCA
—SCL clocking at max frequency = 400kHz.
Specified with 2-wire bus inactive.
Measured with a 32.768kHz crystal attached to the X1 and X2 pins.
WDSTR = 1. BBSQW = 1 is required for operation when V
CC
is below the power-fail trip point (or absent).
C
B
—total capacitance of one bus line in pF.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V
IHMIN
of the SCL sig-
nal) to bridge the undefined region of the falling edge of SCL.
The maximum t
HD:DAT
only has to be met if the device does not stretch the low period (t
LOW
) of the SCL signal.
A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
≥
to 250ns must be met. This is
automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the low
period of the SCL signal, it must output the next data bit to the SDA line t
R
max + t
SU:DAT
= 1000 + 250 = 1250ns before
the SCL line is released.
The parameter t
OSF
is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of
0V
≤
V
CC
≤
V
CC MAX
and 1.3V
≤
V
BACKUP
≤
3.7V.
After this period, the first clock pulse is generated.
This delay applies only if the oscillator is enabled and running. If the
EOSC
bit is 1, the startup time of the oscillator is
added to this delay.
Note 20:
Note 21:
Note 22:
_____________________________________________________________________
5
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Maker DALLAS DALLAS DALLAS
Reach Compliance Code unknown unknown unknown

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