DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP80N03CDE,NP80N03DDE,NP80N03EDE,NP80N03KDE
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
These products are N-channel MOS Field Effect
Transistor designed for high current switching
applications.
ORDERING INFORMATION
PART NUMBER
NP80N03CDE
NP80N03DDE
NP80N03EDE
PACKAGE
TO-220AB
TO-262
TO-263 (MP-25ZJ)
TO-263 (MP-25ZK)
FEATURES
•
Channel Temperature 175 degree rated
•
Super Low On-state Resistance
R
DS(on)1
= 7.0 mΩ MAX. (V
GS
= 10 V, I
D
= 40 A)
R
DS(on)2
= 9.0 mΩ MAX. (V
GS
= 5 V, I
D
= 40 A)
•
Low C
iss
: C
iss
= 2600 pF TYP.
5
NP80N03KDE
(TO-220AB)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC) (T
C
= 25°C)
Drain Current (pulse)
Note2
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
30
±20
±80
±320
120
1.8
175
–55 to +175
50 / 40 / 9
2.5 / 160 / 400
V
V
A
A
W
W
°C
°C
A
mJ
(TO-263)
(TO-262)
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
I
AS
E
AS
Notes 1.
Calculated constant current according to MAX. Allowable channel
temperature.
2.
PW
≤
10
µ
s, Duty cycle
≤
1%
3.
Starting T
ch
= 25°C, R
G
= 25
Ω,
V
GS
= 20
→
0 V (See Figure 4.)
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
R
th(ch-C)
R
th(ch-A)
1.25
83.3
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No.
D15310EJ2V0DS00 (2nd edition)
Date Published December 2002 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
2001
NP80N03CDE,NP80N03DDE,NP80N03EDE,NP80N03KDE
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(th)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge 1
Total Gate Charge 2
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G1
Q
G2
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
I
D
= 80 A, V
DD
= 24 V, V
GS
= 10 V
V
DD
= 24 V
V
GS
= 5 V
I
D
= 80 A
I
F
= 80 A, V
GS
= 0 V
I
F
= 80 A, V
GS
= 0 V
di/dt = 100 A/
µ
s
TEST CONDITIONS
V
DS
= 30 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250
µ
A
V
DS
= 10 V, I
D
= 40 A
V
GS
= 10 V, I
D
= 40 A
V
GS
= 5 V, I
D
= 40 A
V
GS
= 4.5 V, I
D
= 40 A
V
DS
= 25 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 15 V, I
D
= 40 A
V
GS
= 10 V
R
G
= 1
Ω
1.5
20
2.0
41
5.3
6.8
7.5
2600
590
270
20
12
60
14
48
28
10
14
1.0
34
22
7.0
9.0
11
3900
890
490
44
31
120
35
72
42
MIN.
TYP.
MAX.
10
±100
2.5
UNIT
µ
A
nA
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
V
GS
R
L
V
DD
V
DS
90%
90%
10%
10%
V
GS
Wave Form
0
10%
V
GS
90%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
µs
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet D15310EJ2V0DS
NP80N03CDE,NP80N03DDE,NP80N03EDE,NP80N03KDE
TYPICAL CHARACTERISTICS (T
A
= 25°C)
Figure1. DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
140
Figure2. TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
P
T
- Total Power Dissipation - W
dT - Percentage of Rated Power - %
100
80
60
40
20
0
120
100
80
60
40
20
0
0
25
50
75
100 125 150 175 200
0
25
50
75
100 125 150 175 200
T
C
- Case Temperature - ˚C
T
C
- Case Temperature - ˚C
Figure4. SINGLE AVALANCHE ENERGY
DERATING FACTOR
450
Figure3. FORWARD BIAS SAFE OPERATING AREA
1000
E
AS
- Single Avalanche Energy - mJ
I
D(pulse)
I
D
- Drain Current - A
PW
10
0
µ
s
100
d
ite )
Lim 0 V
n)
= 1
S(o
R
D
t V
GS
a
(
=1
400
350
300
250
200
400 mJ
0
µ
s
I
D(DC)
DC
Po
Lim wer
ite Dis
sip
d
ati
1m
on
s
10
I
AS
= 9 A
40 A
50 A
160 mJ
150
100
50
2.5 mJ
0
25
50
75
100
125
150
175
1
T
C
= 25˚C
Single pulse
0.1
0.1
V
DS
1
10
-
Drain to Source Voltage - V
100
Starting T
ch
- Starting Channel Temperature - ˚C
Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(t)
- Transient Thermal Resistance - ˚C/W
100
R
th(ch-A)
= 83.3˚C/W
10
1
R
th(ch-C)
= 1.25˚C/W
0.1
Single pulse
0.01
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D15310EJ2V0DS
3
NP80N03CDE,NP80N03DDE,NP80N03EDE,NP80N03KDE
Figure6. FORWARD TRANSFER CHARACTERISTICS
1000
Pulsed
I
D
- Drain Current - A
Figure7. DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
400
350
Pulsed
V
GS
= 10 V
I
D
- Drain Current - A
100
300
250
200
150
100
50
4.5 V
10
1
T
A
=
−50˚C
25˚C
75˚C
150˚C
175˚C
5V
0.1
1
2
3
4
5
6
0
0.0
1.0
2.0
3.0
4.0
V
GS
- Gate to Source Voltage - V
Figure8. FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
V
DS
= 10 V
Pulsed
10
T
A
= 175˚C
75˚C
25˚C
−50˚C
V
DS
- Drain to Source Voltage - V
Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
50
Pulsed
R
DS(on)
- Drain to Source On-state Resistance - mΩ
| y
fs
| - Forward Transfer Admittance - S
40
30
20
10
1
0.1
I
D
= 40 A
0.01
0.01
0.1
1
10
100
0
0
2
4
6
8
10
12
14
16
18
I
D
- Drain Current - A
V
GS
- Gate to Source Voltage - V
Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
3.0
V
DS
= V
GS
I
D
= 250
µ
A
2.5
2.0
1.5
1.0
0.5
0
−50
R
DS(on)
- Drain to Source On-state Resistance - mΩ
30
Pulsed
20
10
V
GS
= 4.5 V
5V
10 V
0
1
10
100
1000
V
GS(th)
- Gate to Source Threshold Voltage - V
Figure10. DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
0
50
100
150
I
D
- Drain Current - A
T
ch
- Channel Temperature - ˚C
4
Data Sheet D15310EJ2V0DS
NP80N03CDE,NP80N03DDE,NP80N03EDE,NP80N03KDE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
12
Pulsed
10 V
GS
= 4.5 V
5V
10 V
8
6
4
2
0
−50
0
50
100
I
D
= 40 A
150
Figure13. SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1000
Pulsed
I
SD
- Diode Forward Current - A
100 V
GS
= 10 V
10
V
GS
= 0 V
1
0.1
0
0.5
1.0
1.5
T
ch
- Channel Temperature - ˚C
V
SD
- Source to Drain Voltage - V
Figure14. CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
Figure15. SWITCHING CHARACTERISTICS
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
10000
1000
t
f
100
t
d(off)
t
d(on)
10
t
r
C
iss
, C
oss
, C
rss
- Capacitance - pF
V
GS
= 0 V
f = 1 MHz
C
iss
1000
C
oss
C
rss
100
10
0.1
1
10
100
1
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
Figure16. REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1000
t
rr
- Reverse Recovery Time - ns
di/dt = 100 A/µs
V
GS
= 0 V
Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
V
DS
- Drain to Source Voltage - V
16
14
V
GS
V
DD
= 24 V
15 V
6V
12
10
8
6
4
V
DS
I
D
= 80 A
2
30
40
50
60
70
80
0
V
GS
- Gate to Source Voltage - V
35
30
25
20
15
10
5
0
0
10
100
10
1
0.1
1
10
100
20
I
F
- Drain Current - A
Q
G
- Gate Charge - nC
Data Sheet D15310EJ2V0DS
5
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