2.5A Regulator with Integrated High-Side MOSFET for
Synchronous Buck or Boost Buck Converter
ISL85402
The ISL85402 is a synchronous buck controller with a 125mΩ
high-side MOSFET and low-side driver integrated. The ISL85402
supports a wide input voltage range from 3V to 36V. Regarding the
output current capability from the thermal perspective, the
ISL85402 can typically support continuous load of 2.5A under
conditions of 5V V
OUT
, V
IN
range of 8V to 30V, 500kHz, +85°C
ambient temperature with still air. For any specific application, the
actual maximum output current depends upon the die temperature
not exceeding +125°C with the power dissipated in the IC, which is
related to input voltage, output voltage, duty cycle, switching
frequency, board layout and ambient temperature, etc. Refer to
“Output Current” on page 13 for more details.
The ISL85402 has flexible selection of operation modes of
forced PWM mode and PFM mode. In PFM mode, the
quiescent input current is as low as 180µA (AUXVCC connected
to V
OUT
). The load boundary between PFM and PWM can be
programmed to cover wide applications.
The low-side driver can be either used to drive an external low-side
MOSFET for a synchronous buck, or left unused for a standard
non-synchronous buck. The low-side driver can also be used to
drive a boost converter as a pre-regulator followed by a buck
controlled by the same IC, which greatly expands the operating
input voltage range down to 3V or lower (Refer to “Typical
Application Schematic III - Boost Buck Converter” on page 5).
The ISL85402 offers the most robust current protections. It
uses peak current mode control with cycle-by-cycle current
limiting. It is implemented with frequency foldback under
current limit condition; besides that, the hiccup overcurrent
mode is also implemented to guarantee reliable operations
under harsh short conditions.
The ISL85402 has comprehensive protections against various faults
including overvoltage and over-temperature protections, etc.
Features
• Ultra Wide Input Voltage Range 3V to 36V
• Optional Mode Operation
- Forced PWM Mode
- Selectable PFM with Programmable PFM/PWM Boundary
• 300µA IC Quiescent Current (PFM, No Load); 180µA Input
Quiescent Current (PFM, No Load, V
OUT
Connected to
AUXVCC)
• Less than 3µA Standby Input Current (IC Disabled)
• Operational Topologies
- Synchronous Buck
- Non-Synchronous Buck
- Two-Stage Boost Buck
• Programmable Frequency from 200kHz to 2.2MHz and
Frequency Synchronization Capability
•
±
1% Tight Voltage Regulation Accuracy
• Reliable Overcurrent Protection
- Temperature Compensated Current Sense
- Cycle-by-Cycle Current Limiting with Frequency Foldback
- Hiccup Mode for Worst Case Short Condition
• 20 Ld 4x4 QFN Package
• Pb-Free (RoHS Compliant)
Applications
• General Purpose
• 24V Bus Power
• Battery Power
• Point of Load
• Embedded Processor and I/O Supplies
100
95
PGOOD
EN
MODE
SYNC
AUXVCC
VCC
ILIMIT
SS
EXT_BOOST
FS
SGND
LGATE
PGND
FB
COMP
ISL85402
6V V
IN
12V V
IN
36V V
IN
24V V
IN
90
EFFICIENCY (%)
VIN
VIN
85
80
75
70
65
60
55
50
0.1m
BOOT
VOUT
PHASE
1m
10m
100m
1.0
2.5
LOAD CURRENT (A)
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. EFFICIENCY, SYNCHRONOUS BUCK, PFM MODE,
V
OUT
5V, T
A
= +25°C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
September 29, 2011
FN7640.0
1
ISL85402
Pin Configuration
ISL85402
(20 LD QFN)
TOP VIEW
AUXVCC
SGND
VCC
20
19
18
17
16
VIN
VIN
EN
FS
SS
FB
COMP
1
2
3
4
5
15
14
BOOT
PGND
LGATE
SYNC
EXT_BOOST
21
Thermal Pad
21
PAD
13
12
11
6
7
8
9
10
PHASE
Functional Pin Descriptions
PIN NAME
EN
FS
SS
PIN #
1
2
3
DESCRIPTION
The controller is enabled when this pin is left floating or pulled HIGH. The IC is disabled when this pin is pulled LOW. Range: 0V to
5.5V.
To connect this pin to VCC, or GND, or left open will force the IC to have 500kHz switching frequency. The oscillator switching
frequency can also be programmed by adjusting the resistor from this pin to GND.
Connect a capacitor from this pin to ground. This capacitor, along with an internal 5µA current source, sets the soft-start interval of
the converter. Also this pin can be used to track a ramp on this pin.
This pin is the inverting input of the voltage feedback error amplifier. With a properly selected resistor divider connected from V
OUT
to FB, the output voltage can be set to any voltage between the power rail (reduced by maximum duty cycle and voltage drop) and
the 0.8V reference. Loop compensation is achieved by connecting an RC network across COMP and FB. The FB pin is also monitored
for overvoltage events.
Output of the voltage feedback error amplifier.
Programmable current limit pin. With this pin connected to VCC pin, or to GND, or left open, the current limiting threshold is the set
to default 3.6A; the current limiting threshold can be programmed with a resistor from this pin to GND.
Mode selection pin. Pull this pin to GND for forced PWM mode; to have it floating or connected to VCC will enable PFM mode when
the peak inductor current is below the default threshold 700mA. The current boundary threshold between PFM and PWM can also
be programmed with a resistor at this pin to ground. Check for more details in the “PFM Mode Operation” on page 12.
PGOOD is an open drain output that will be pulled low immediately under the events when the output is out of regulation (OV or UV)
or EN pin pulled low. PGOOD is equipped with a fixed delay of 1000 cycles upon output power-up (V
O
> 90%).
These pins are the PHASE nodes that should be connected to the output inductor. These pins are connected the source of the
high-side N-channel MOSFET.
This pin is used to set boost mode and monitor the battery voltage that is the input of the boost converter. After VCC POR, the
controller will detect the voltage on this pin, if voltage on this pin is below 200mV, the controller is set in
synchronous/non-synchronous buck mode and latch in this state unless VCC is below POR falling threshold; if the voltage on this
pin after VCC POR is above 200mV, the controller is set in boost mode and latch in this state. In boost mode the low-side driver
output PWM with same duty cycle with upper-side driver to drive the boost switch.
In boost mode, this pin is used to monitor input voltage through a resistor divider. By setting the resistor divider, the high threshold
and hysteresis can be programmed. When voltage on this pin is above 0.8V, the PWM output (LGATE) for the boost converter is
disabled, and when voltage on this pin is below 0.8V minus the hysteresis, the boost PWM is enabled.
In boost mode operation, PFM is disabled when boost PWM is enabled. Check the “Boost Converter Operation” on page 13 for more
details.
FB
4
COMP
ILIMIT
5
6
MODE
7
PGOOD
PHASE
8
9, 10
EXT_BOOST
11
2
PGOOD
PHASE
MODE
ILIMIT
FN7640.0
September 29, 2011
ISL85402
Functional Pin Descriptions
PIN NAME
PIN #
(Continued)
DESCRIPTION
This pin can be used to synchronize two or more ISL85402 controllers. Multiple ISL85402 can be synchronized with their SYNC pins
connected together. 180 degree phase shift is automatically generated between the master and slave ICs.
The internal oscillator can also lock to an external frequency source applied on this pin with square pulse waveform (with frequency
10% higher than the IC’s local frequency, and pulse width higher than 150ns). Range: 0V to 5.5V.
This pin should be left floating if not used.
In synchronous buck mode, this Pin is used to drive the lower side MOSFET to improve efficiency.
In non-synchronous buck when a diode is used as the bottom side power device, this pin should be connected to VCC before VCC
startup to have low-side driver (LGATE) disabled.
In boost mode, it can be used to drive the boost power MOSFET. The boost control PWM is same with the buck control PWM.
This pin is used as the ground connection of the power flow including driver. Connect it to large ground plane.
This pin provides bias voltage to the high-side MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive the
internal N-channel MOSFET. The boot charge circuitries are integrated inside of the IC. No external boot diode is needed. A 1µF
ceramic capacitor is recommended to be used between BOOT and PHASE pin.
Connect the input rail to these pins that are connected to the drain of the integrated high-side MOSFET as well as the source for the
internal linear regulator that provides the bias of the IC. Range: 3V to 36V.
With the part switching, the operating input voltage applied to the VIN pins must be under 36V. This recommendation allows for
short voltage ringing spikes (within a couple of ns time range) due to switching while not exceeding Absolute Maximum Ratings.
This pin provides the return path for the control and monitor portions of the IC. Connect it to quite ground plane.
This pin is the output of the internal linear regulator that supplies the bias for the IC including the driver. A minimum 4.7µF
decoupling ceramic capacitor is recommended between VCC to ground.
This pin is the input of the auxiliary internal linear regulator which can be supplied by the regulator output after power-up. With such
configuration, the power dissipation inside of the IC is reduced. The input range for this LDO is 3V to 20V.
In boost mode operation, this pin works as boost output overvoltage detection pin. It detects the boost output through a resistor
divider. When voltage on this pin is above 0.8V, the boost PWM disabled; and when voltage on this pin is below 0.8V minus the
hysteresis, the boost PWM is enabled.
Range: 0V to 20V.
Bottom thermal pad. It is not connected to any electrical potential of the IC. In layout it must be connected to PCB ground copper
plane with area as large as possible to effectively reduce the thermal impedance.
SYNC
12
LGATE
13
PGND
BOOT
14
15
VIN
16, 17
SGND
VCC
AUXVCC
18
19
7
PAD
21
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL85402IRZ
ISL85402EVAL1Z
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL85402.
For more information on MSL please see techbrief
TB363.
PART
MARKING
85 402IRZ
Evaluation Board
TEMP.
RANGE (°C)
-40 to +85
PACKAGE
(PB-Free)
20 Ld 4x4 QFN
PKG. DWG. #
L20.4x4C
3
FN7640.0
September 29, 2011
Block Diagram
VCC
AUXVCC
PGOOD
VIN (x2)
VIN
CURRENT
MONITOR
BIAS LDO
AUXILARY LDO
4
SGND
POWER-ON
RESET
ILIMIT
VCC
EN
EXT_BOOST
MODE
PFM/FPWM
OCP, OVP, OTP
PFM LOGIC
BOOST MODE CONTROL
BOOT
ISL85402
PHASE (x2)
GATE DRIVE
SYNC
VOLTAGE
MONITOR
OSCILLATOR
SLOPE
COMPENSATION
LGATE
FS
+
SOFT-START
LOGIC
+
BOOT REFRESH
VCC
5 µA
0.8V
REFERENCE
EA
COMPARATOR
SS
FB
COMP
PGND
FN7640.0
September 29, 2011
ISL85402
Typical Application Schematic I
PGOOD
EN
MODE
SYNC
AUXVCC
VCC
ILIMIT
SS
EXT_BOOST
FS
SGND
LGATE
PGND
FB
COMP
ISL85402
VIN
VIN
PGOOD
EN
MODE
SYNC
AUXVCC
V OUT
VCC
ILIMIT
SS
EXT_BOOST
FS
SGND
LGATE
PGND
FB
COMP
ISL85402
VIN
VIN
BOOT
BOOT
V OUT
PHASE
PHASE
(a) SYNCHRONOUS BUCK
(b) NON-SYNCHRONOUS BUCK
Typical Application Schematic II - VCC Switch-Over to V
OUT
PGOOD
EN
MODE
SYNC
AUXVCC
VCC
ILIMIT
SS
EXT_BOOST
FS
SGND
LGATE
PGND
FB
COMP
ISL85402
VIN
VIN
PGOOD
EN
MODE
SYNC
AUXVCC
VOUT
VCC
ILIMIT
SS
EXT_BOOST
FS
SGND
LGATE
PGND
FB
COMP
ISL85402
VIN
VIN
BOOT
BOOT
V OUT
PHASE
PHASE
(a) SYNCHRONOUS BUCK
(b) NON-SYNCHRONOUS BUCK
Typical Application Schematic III - Boost Buck Converter
Battery
R1
R2
+
+
PGOOD
EN
MODE
SYNC
VCC
ILIMIT
SS
FS
SGND
EXT_BOOST
LGATE
AUXVCC
VIN
ISL85402
BOOT
PHASE
R3
R4
V OUT
PGND
COMP
FB
5
FN7640.0
September 29, 2011
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