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TPCA8105(TE12L,Q)

Description
TRANSISTOR,MOSFET,P-CHANNEL,12V V(BR)DSS,6A I(D),SO
CategoryDiscrete semiconductor    The transistor   
File Size246KB,7 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Environmental Compliance
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TPCA8105(TE12L,Q) Overview

TRANSISTOR,MOSFET,P-CHANNEL,12V V(BR)DSS,6A I(D),SO

TPCA8105(TE12L,Q) Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerToshiba Semiconductor
package instruction,
Reach Compliance Codeunknown
ConfigurationSingle
Maximum drain current (Abs) (ID)6 A
Maximum drain current (ID)6 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Polarity/channel typeP-CHANNEL
Maximum power dissipation(Abs)20 W
surface mountYES

TPCA8105(TE12L,Q) Preview

TPCA8105
TOSHIBA Field Effect Transistor
Silicon P-Channel MOS Type (U-MOS III)
TPCA8105
Notebook PC Applications
Portable Equipment Applications
0.5±0.1
8
Unit: mm
1.27
0.4±0.1
5
0.05 M A
Small footprint due to compact and slim package
6.0±0.3
5.0±0.2
Low drain-source ON-resistance : R
DS (ON)
= 23 mΩ (typ.)
(V
GS
=
4.5V)
High forward transfer admittance :|Y
fs
| = 14 S (typ.)
Low leakage current : I
DSS
=
−10 μA
(V
DS
=
−12
V)
Enhancement mode
: V
th
=
−0.5
to
−1.2
V (V
DS
=
−10
V, I
D
=
−200 μA
)
0.15±0.05
1
5.0±0.2
0.95±0.05
4
0.595
A
0.166±0.05
S
1
0.05 S
4
1.1±0.2
0.6±0.1
4.25±0.2
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Drain-source voltage
Drain-gate voltage (R
GS
=
20 kΩ)
Gate-source voltage
Drain current
DC
Pulse
(Note 1)
(Note 1)
Symbol
V
DSS
V
DGR
V
GSS
I
D
I
DP
P
D
P
D
P
D
E
AS
I
AR
E
AR
T
ch
T
stg
Rating
−12
−12
±8
−6
−24
20
2.8
1.6
25.1
−6
0.8
150
−55
to 150
mJ
A
mJ
°C
°C
Unit
V
V
V
A
8
5
0.8±0.1
1, 2, 3: Source
5, 6, 7, 8: Drain
4: Gate
JEDEC
JEITA
TOSHIBA
2-5Q1A
Weight: 0.076 g (typ.)
Drain power dissipation (Tc
=
25°C)
Drain power dissipation (t
=
10 s)
(Note 2a)
Drain power dissipation (t
=
10 s)
(Note 2b)
Single pulse avalanche energy
Avalanche current
Repetitive avalanche energy
(Tc = 25°C) (Note 4)
Channel temperature
Storage temperature range
(Note 3)
Circuit Configuration
W
8
7
6
3.5±0.2
5
1
2
3
4
Note: For (Note 1), (Note 2), (Note 3), (Note 4), refer to the next page.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with caution.
1
2010-03-02
TPCA8105
Thermal Characteristics
Characteristics
Thermal resistance, channel to case (Tc = 25
℃)
Thermal resistance, channel to ambient
(t
=
10 s) (Note 2a)
Thermal resistance, channel to ambient
(t
=
10 s) (Note 2b)
Symbol
R
th (ch-c)
R
th (ch-a)
R
th (ch-a)
Max
6.25
44.6
°C/W
78.1
Unit
°C/W
Marking (Note 5)
TPCA
8105
Type
Lot No.
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: (a) Device mounted on a glass-epoxy board (a)
(b) Device mounted on a glass-epoxy board (b)
FR-4
25.4
×
25.4
×
0.8
(Unit: mm)
FR-4
25.4
×
25.4
×
0.8
(Unit: mm)
(a)
(b)
Note 3: V
DD
= −10
V, T
ch
=
25°C (initial), L
=
0.5 mH, R
G
=
25
Ω,
I
AR
= −6.0
A
Note 4: Repetitive rating: pulse width limited by maximum channel temperature.
Note 5: Weekly code: (Three digits)
Week of manufacture
(01 for first week of a year, continues up to 52 or 53)
Year of manufacture
(The last digit of the calendar year)
2
2010-03-02
TPCA8105
Electrical Characteristics
(Ta = 25°C)
Characteristics
Gate leakage current
Drain cut-off current
Drain-source breakdown
voltage
Gate threshold voltage
Symbol
I
GSS
I
DSS
V
(BR) DSS
V
(BR) DSX
V
th
Test Condition
V
GS
= ±8 V, V
DS
= 0 V
V
DS
=
−12
V, V
GS
= 0 V
I
D
=
−10
mA, V
GS
= 0 V
I
D
=
−10
mA, V
GS
= 8 V
V
DS
=
−10
V, I
D
=
−200 μA
V
GS
=
−1.8
V, I
D
=
−1.5
A
Drain-source ON-resistance
R
DS (ON)
V
GS
=
−2.5
V, I
D
=
−3.0
A
V
GS
=
−4.5
V, I
D
=
−3.0
A
Forward transfer admittance
Input capacitance
Reverse transfer capacitance
Output capacitance
Rise time
|Y
fs
|
C
iss
C
rss
C
oss
t
r
t
on
t
f
t
off
Q
g
Q
gs
Q
gd
V
GS
0V
−5
V
4.7
Ω
I
D
= −3.0A
Output
R
L
=
2
Ω
V
DS
=
−10
V, V
GS
= 0 V, f = 1 MHz
V
DS
=
−10
V, I
D
=
−3.0
A
Min
−12
−4
−0.5
7
Typ.
65
36
23
14
1600
260
335
7
Max
±10
−10
−1.2
92
51
33
pF
S
Unit
μA
μA
V
V
Turn-on time
Switching time
Fall time
13
ns
V
DD
−6
V
Duty
<
1%, t
w
=
10
μs
=
21
Turn-off time
Total gate charge
(gate-source plus gate-drain)
Gate-source charge
Gate-drain (“Miller”) charge
68
18
14.5
3.5
nC
V
DD
−10
V, V
GS
=
−5
V
I
D
=
−6
A
Source-Drain Ratings and Characteristics
(Ta = 25°C)
Characteristics
Drain reverse current
Forward voltage (diode)
Pulse (Note 1)
Symbol
I
DRP
V
DSF
Test Condition
I
DR
=
−6
A, V
GS
= 0 V
Min
Typ.
Max
−24
1.2
Unit
A
V
3
2010-03-02
TPCA8105
I
D
– V
DS
−5
−5
−4.5
−4
−3
−2.5
−1.9
−1.8
−2
−1.7
−10
I
D
– V
DS
−2.5 −2
Common source
Ta
=
25°C Pulse test
−3
−4
−5
−6
−1.7
−4
(A)
(A)
−4
−3
−1.6
−8
−1.9
−1.8
I
D
Drain current
−2
−1.5
Drain current
I
D
−1.6
−1.5
VGS
= −1.4
V
−1
VGS
= −1.4
V
Common source
Ta
=
25°C Pulse test
−0.2
−0.4
−0.6
−0.8
−1.0
−2
0
0
0
0
−1
−2
−3
−4
−5
Drain−source voltage
V
DS
(V)
Drain−source voltage
V
DS
(V)
I
D
– V
GS
−10
V
DS
– V
GS
−0.5
−8
V
DS
(V)
Common source
VDS
= −10
V
Pulse test
−0.4
Common source
Ta
=
25°C
Pulse test
I
D
(A)
−6
−4
Drain−source voltage
−0.3
Drain current
Ta
=
25°C
Ta
= −55°C
Ta
=
100°C
−0.2
ID
= −6
A
−0.1
−3
A
−1.5
A
−2
−4
−6
−8
−10
−2
0
0
−0.5
−1.0
−1.5
−2.0
−2.5
0
0
Gate−source voltage
V
GS
(V)
Gate−source voltage
V
GS
(V)
|Y
fs
| – I
D
100
Common source
VDS
= −10
V
Pulse test
Ta
=
25°C
10
Ta
=
100°C
1000
Common source
Ta
=
25°C
Pulse test
R
DS (ON)
– I
D
(S)
Ta
= −55°C
⎪Y
fs
Drain−source ON-resistance
R
DS (ON)
(mΩ)
100
−1.8
V
−2.5
V
Forward transfer admittance
VGS
= −4.5
V
10
1
0.1
−0.1
−1
−10
−100
1
−0.1
−1
−10
−100
Drain current
I
D
(A)
Drain currrent
I
D
(A)
4
2010-03-02
TPCA8105
160
Common source
R
DS (ON)
– Ta
−100
Pulse test
I
DR
– V
DS
Common source
Ta
=
25°C
Pulse test
Drain−source ON-resistance
R
DS (ON)
(m
Ω)
I
DR
120
(A)
−4.5
−2.5
−1.8
−1
VGS
=
0 V
80
VGS
= −1.8
V
ID
= −1.5
A
40
−2.5
V
−4.5
V
0
−80
−40
0
40
ID
= −2.5
A
−6
A
ID
= −1.5
A
−2.5
A
Drain reverse current
−10
ID
= −1.5, −2.5, −6
A
80
120
160
−1
0
0.4
0.8
1.2
1.6
2.0
Ambient temperature
Ta
(°C)
Drain−source voltage
V
DS
(V)
Capacitance – V
DS
10000
VGS
=
0 V
f
=
1 MHz
Ta
=
25°C
Ciss
−2.0
V
th
– Ta
Common source
VDS
= −10
V
ID
= −200 μA
Pulse test
(pF)
V
th
(V)
Gate threshold voltage
1000
Coss
Crss
100
−1.5
Capacitance
C
−1.0
−0.5
10
−0.1
−1
−10
−100
0
−80
−40
0
40
80
120
160
Drain−source voltage
V
DS
(V)
Ambient temperature
Ta
(°C)
Dynamic input/output characteristics
−20
Common source
ID
= −6
A
−16
Ta
=
25°C
Pulse test
−12
VGS
VDS
−4
−2.5
V
VDD
= −10
V
−5
V
−4
−12
−16
−20
V
DS
(V)
Drain−source voltage
−8
−8
0
0
8
16
24
32
0
40
Total gate charge
Q
g
(nC)
Gate-source voltage
V
GS
(V)
5
2010-03-02

TPCA8105(TE12L,Q) Related Products

TPCA8105(TE12L,Q) TPCA8105(TE12L1)
Description TRANSISTOR,MOSFET,P-CHANNEL,12V V(BR)DSS,6A I(D),SO TPCA8105(TE12L1)
Maker Toshiba Semiconductor Toshiba Semiconductor
Reach Compliance Code unknown unknown

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