LPC5411x
32-bit ARM Cortex-M4/M0+ MCU; 192 KB SRAM; 256 KB flash,
Crystal-less USB operation, DMIC subsystem, Flexcomm
Interface, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0
Msamples/sec ADC, Temperature sensor
Rev. 1 — 23 December 2016
Product data sheet
1. General description
The LPC5411x are ARM Cortex-M4 based microcontrollers for embedded applications.
These devices include an ARM Cortex-M0+ coprocessor, up to 192 KB of on-chip SRAM,
up to 256 KB on-chip flash, full-speed USB device interface with Crystal-less operation, a
DMIC subsystem with PDM microphone interface and I2S, five general-purpose timers,
one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a
Windowed Watchdog Timer (WWDT), eight flexible serial communication peripherals
(each of which can be a USART, SPI, or I
2
C interface), and one 12-bit 5.0 Msamples/sec
ADC, and a temperature sensor.
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level of support block integration. The
ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals, and
includes an internal prefetch unit that supports speculative branching. The ARM
Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A
hardware floating-point unit is integrated in the core.
The ARM Cortex-M0+ coprocessor is an energy-efficient and easy-to-use 32-bit core
which is code and tool-compatible with the Cortex-M4 core. The Cortex-M0+ coprocessor
offers up to 100 MHz performance with a simple instruction set and reduced code size.
2. Features and benefits
Dual processor cores: ARM Cortex-M4 and ARM Cortex-M0+. Both cores operate up
to a maximum frequency of 100 MHz.
ARM Cortex-M4 core (version r0p1):
ARM Cortex-M4 processor, running at a frequency of up to 100 MHz.
Floating Point Unit (FPU) and Memory Protection Unit (MPU).
ARM Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input with a selection of sources.
Serial Wire Debug (SWD) with six instruction breakpoints, two literal comparators,
and four watch points. Includes Serial Wire Output for enhanced debug
capabilities.
System tick timer.
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
ARM Cortex-M0+ core
ARM Cortex-M0+ processor, running at a frequency of up to 100 MHz (uses the
same clock as Cortex-M4) with a single-cycle multiplier and a fast single-cycle I/O
port.
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input with a selection of sources.
Serial Wire Debug with four breakpoints and two watch points.
System tick timer.
On-chip memory:
Up to 256 KB on-chip flash program memory with flash accelerator and 256 byte
page erase and write.
Up to 192 KB total SRAM consisting of 160 KB contiguous main SRAM and an
additional 32 KB SRAM on the I&D buses.
ROM API support:
Flash In-Application Programming (IAP) and In-System Programming (ISP).
ROM-based USB drivers (HID, CDC, MSC, and DFU). Flash updates via USB is
supported.
Supports booting from valid user code in flash, USART, SPI, and I
2
C.
Legacy, Single, and Dual image boot.
Serial interfaces:
Flexcomm Interface contains eight serial peripherals. Each can be selected by
software to be a USART, SPI, or I
2
C interface. Two Flexcomm Interfaces also
include an I
2
S interface. Each Flexcomm Interface includes a FIFO that supports
USART, SPI, and I
2
S if supported by that Flexcomm Interface. A variety of clocking
options are available to each Flexcomm Interface and include a shared fractional
baud-rate generator.
I
2
C-bus interfaces support Fast-mode and Fast-mode Plus with data rates of up to
1Mbit/s and with multiple address recognition and monitor mode. Two sets of true
I
2
C pads also support high speed mode (3.4 Mbit/s) as a slave.
Crystal-less USB full-speed device interface.
Digital peripherals:
DMA controller with 20 channels and 20 programmable triggers, able to access all
memories and DMA-capable peripherals.
Up to 48 General-Purpose Input/Output (GPIO) pins. Most GPIOs have
configurable pull-up/pull-down resistors, programmable open-drain mode, and
input inverter.
GPIO registers are located on the AHB for fast access.
Up to eight GPIOs can be selected as pin interrupts (PINT), triggered by rising,
falling or both input edges.
Two GPIO grouped interrupts (GINT) enable an interrupt based on a logical
(AND/OR) combination of input states.
CRC engine.
LPC5411x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1 — 23 December 2016
2 of 102
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
Analog peripherals:
12-bit ADC with 12 input channels and with multiple internal and external trigger
inputs and sample rates of up to 5.0 MSamples/sec. The ADC supports two
independent conversion sequences.
Integrated temperature sensor connected to the ADC.
DMIC subsystem including a dual-channel PDM microphone interface, flexible
decimators, 16 entry FIFOs, optional DC locking, hardware voice activity detection,
and the option to stream the processed output data to I
2
S.
Timers:
Five 32-bit standard general purpose timers/counters, four of which support up to
four capture inputs and four compare outputs, PWM mode, and external count
input. Specific timer events can be selected to generate DMA requests. The fifth
timer does not have external pin connections and may be used for internal timing
operations.
One SCTimer/PWM with eight input and eight output functions (including capture
and match). Inputs and outputs can be routed to or from external pins and internally
to or from selected peripherals. Internally, the SCTimer/PWM supports ten
captures/matches, ten events, and ten states.
32-bit Real-time clock (RTC) with 1 s resolution running in the always-on power
domain. A timer in the RTC can be used for wake-up from all low power modes
including deep power-down, with 1 ms resolution.
Multiple-channel multi-rate 24-bit timer (MRT) for repetitive interrupt generation at
up to four programmable, fixed rates.
Windowed Watchdog Timer (WWDT).
Clock generation:
12 MHz internal Free Running Oscillator (FRO). This oscillator provides a
selectable 48 MHz or 96 MHz output, and a 12 MHz output (divided down from the
selected higher frequency) that can be used as a system clock. The FRO is
trimmed to
1
% accuracy over the entire voltage and temperature range.
External clock input for clock frequencies of up to 25 MHz.
Watchdog oscillator (WDTOSC) with a frequency range of 6 kHz to 1.5 MHz.
32.768 kHz low-power RTC oscillator.
System PLL allows CPU operation up to the maximum CPU rate without the need
for a high-frequency external clock. May be run from the internal FRO 12 MHz
output, the external clock input CLKIN, or the RTC oscillator.
Clock output function with divider.
Frequency measurement unit for measuring the frequency of any on-chip or
off-chip clock signal.
Power control:
Programmable PMU (Power Management Unit) to minimize power consumption
and to match requirements at different performance levels.
Reduced power modes: sleep, deep-sleep, and deep power-down.
Wake-up from deep-sleep modes due to activity on the USART, SPI, and I2C
peripherals when operating as slaves.
LPC5411x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1 — 23 December 2016
3 of 102
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
The Micro-Tick Timer running from the watchdog oscillator can be used to wake-up
the device from any reduced power modes.
Power-On Reset (POR).
Brown-Out Detect (BOD) with separate thresholds for interrupt and forced reset.
Single power supply 1.62 V to 3.6 V.
JTAG boundary scan supported.
128 bit unique device serial number for identification.
Operating temperature range
40
°C to +105 °C.
Available as WLCSP49 and LQFP64 packages.
LPC5411x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1 — 23 December 2016
4 of 102
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
3. Ordering information
Table 1.
Ordering information
Package
Name
LPC54113J256UK49
LPC54114J256UK49
LPC54113J128BD64
LPC54113J256BD64
LPC54114J256BD64
WLCSP49
WLCSP49
LQFP64
LQFP64
LQFP64
Description
Version
wafer level chip-size package; 49 (7 x 7) bumps; 3.436 x 3.436 x 0.525 mm -
wafer level chip-size package; 49 (7 x 7) bumps; 3.436 x 3.436 x 0.525 mm -
plastic low profile quad flat package; 64 leads; body 10
10
1.4 mm
plastic low profile quad flat package; 64 leads; body 10
10
1.4 mm
plastic low profile quad flat package; 64 leads; body 10
10
1.4 mm
SOT314-2
SOT314-2
SOT314-2
Type number
3.1 Ordering options
Table 2.
Ordering options
Flash
in KB
256
256
128
256
256
SRAM in KB
SRAMX SRAM0 SRAM1 SRAM2 Total
32
32
32
32
32
64
64
64
64
64
64
64
-
64
64
32
32
-
32
32
192
192
96
192
192
Cortex-M4 Cortex-M0+ USB FS GPIO
with FPU
1
1
1
1
1
0
1
0
0
1
1
1
1
1
1
37
37
48
48
48
Type number
LPC54113J256UK49
LPC54114J256UK49
LPC54113J128BD64
LPC54113J256BD64
LPC54114J256BD64
4. Marking
Terminal 1
index area
n
Terminal 1 index area
1
aaa-011231
aaa-015675
Fig 1.
LQFP64 package marking
Fig 2.
WLCSP49 package marking
LPC5411x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1 — 23 December 2016
5 of 102
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