M68AF127BM70B6U datasheet, PDF

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M68AF127BM70B6U: Description128KX8 STANDARD SRAM, 70ns, PDIP32, 0.600 INCH, PLASTIC, DIP-32; Categorystorage storage; File Size152KB，23 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M68AF127BM70B6U Overview

128KX8 STANDARD SRAM, 70ns, PDIP32, 0.600 INCH, PLASTIC, DIP-32

M68AF127BM70B6U Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	DIP
package instruction	0.600 INCH, PLASTIC, DIP-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	70 ns
JESD-30 code	R-PDIP-T32
length	42.035 mm
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128KX8
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	4.83 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm

M68AF127BM70B6U Preview

M68AF127B

1Mbit (128K x8), 5V Asynchronous SRAM

FEATURES SUMMARY

■

SUPPLY VOLTAGE: 4.5 to 5.5V

128K x 8 bits SRAM with OUTPUT ENABLE

EQUAL CYCLE and ACCESS TIMES: 55ns

LOW STANDBY CURRENT

LOW V

DATA RETENTION: 2V

TRI-STATE COMMON I/O

LOW ACTIVE and STANDBY POWER

Figure 1. Packages

SO32 (MC)

PDIP32 (B)

TSOP32 (NK)

8 x 13.4mm

TSOP32 (N)

8 x 20mm

September 2004

1/23

M68AF127B

TABLE OF CONTENTS

FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

TABLE OF CONTENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 2.

Table 1.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

SO Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 3. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 4. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 7. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 8. AC Measurement Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 5. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 6. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 9. Address Controlled, Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 10.Chip Enable or Output Enable Controlled, Read Mode AC Waveforms . . . . . . . . . . . . . 11

Figure 11.Chip Enable Controlled, Standby Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 7. Read and Standby Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12.Write Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 13.Chip Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 8. Write Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 14.E1 Controlled, Low V

Data Retention AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 15.E2 Controlled, Low V

Data Retention AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 9. Low V

Data Retention Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 16.SO32 - 32 lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 10. SO32 - 32 lead Plastic Small Outline, Package Mechanical Data. . . . . . . . . . . . . . . . . . 17

Figure 17.PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . 18

Table 11. PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . 18

Figure 18.TSOP32 - 32-lead Thin Small Outline Package, 8x13.4mm, Package Outline . . . . . . . . 19

2/23

M68AF127B

Table 12. TSOP32 - 32-lead Thin Small Outline Package, 8x13.4mm, Package Mechanical

Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 19.TSOP32 - 32 lead Plastic Thin Small Outline, 8x20mm, Package Outline . . . . . . . . . . . 20

Table 13. TSOP32 - 32 lead Plastic Thin Small Outline, 8x20mm, Package Mechanical Data . . . 20

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 14. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 15. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3/23

M68AF127B

SUMMARY DESCRIPTION

The M68AF127B is a 1Mbit (1,048,576 bit) CMOS

SRAM, organized as 131,072 words by 8 bits. The

device features fully static operation requiring no

external clocks or timing strobes, with equal ad-

dress access and cycle times. It requires a single

4.5 to 5.5V supply.

This device has an automatic power-down feature,

reducing the power consumption by over 99%

when deselected.

The M68AF127B is available in SO32, PDIP32,

TSOP32 (8x13.4mm) and TSOP32 (8x20mm)

packages.

Figure 2. Logic Diagram

Table 1. Signal Names

A0-A16

DQ0-DQ7

Address Inputs

Data Input/Output

Chip Enable

Output Enable

Write Enable

Supply Voltage

Ground

VCC

A0-A16

DQ0-DQ7

M68AF127B

VSS

AI05472B

4/23

M68AF127B

Figure 3. SO Connections

Figure 5. TSOP Connections

A16

A14

A12

DQ0

DQ1

DQ2

VSS

M68AF127B

AI07270B

VCC

A15

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

A11

A13

A15

VCC

A16

A14

A12

M68AF127B

AI05473d

A10

DQ7

DQ6

DQ5

DQ4

DQ3

VSS

DQ2

DQ1

DQ0

Figure 4. DIP Connections

A16

A14

A12

DQ0

DQ1

DQ2

VSS

M68AF127B

VCC

A15

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

AI07203B

5/23

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