MT47H256M8EB-3:C datasheet, PDF

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MT47H256M8EB-3:C: DescriptionDDR DRAM, 256MX8, 0.45ns, CMOS, PBGA60, 9 X 11.50 MM, ROHS COMPLIANT, FBGA-60; Categorystorage storage; File Size2MB，133 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT47H256M8EB-3:C Overview

DDR DRAM, 256MX8, 0.45ns, CMOS, PBGA60, 9 X 11.50 MM, ROHS COMPLIANT, FBGA-60

MT47H256M8EB-3:C Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	BGA
package instruction	TFBGA, BGA60,9X11,32
Contacts	60
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	MULTI BANK PAGE BURST
Maximum access time	0.45 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	333 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B60
JESD-609 code	e1
length	11.5 mm
memory density	2147483648 bit
Memory IC Type	DDR DRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	60
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	256MX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA60,9X11,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	4,8
Maximum standby current	0.012 A
Maximum slew rate	0.225 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	9 mm

MT47H256M8EB-3:C Preview

2Gb: x4, x8, x16 DDR2 SDRAM

Features

DDR2 SDRAM

MT47H512M4 – 64 Meg x 4 x 8 banks

MT47H256M8 – 32 Meg x 8 x 8 banks

MT47H128M16 – 16 Meg x 16 x 8 banks

Features

•

= 1.8V ±0.1V, V

DDQ

= 1.8V ±0.1V

JEDEC-standard 1.8V I/O (SSTL_18-compatible)

Differential data strobe (DQS, DQS#) option

4n-bit prefetch architecture

Duplicate output strobe (RDQS) option for x8

DLL to align DQ and DQS transitions with CK

8 internal banks for concurrent operation

Programmable CAS latency (CL)

Posted CAS additive latency (AL)

WRITE latency = READ latency - 1

Programmable burst lengths: 4 or 8

Adjustable data-output drive strength

64ms, 8192-cycle refresh

On-die termination (ODT)

Industrial temperature (IT) option

RoHS-compliant

Supports JEDEC clock jitter specification

Options

• Configuration

– 512 Meg x 4 (64 Meg x 4 x 8 banks)

– 256 Meg x 8 (32 Meg x 8 x 8 banks)

– 128 Meg x 16 (16 Meg x 16 x 8 banks)

• FBGA package (Pb-free) – x16

– 84-ball FBGA (11.5mm x 14mm) Rev. A

• FBGA package (Pb-free) – x4, x8

– 60-ball FBGA (11.5mm x 14mm) Rev. A

• FBGA package (Pb-free) – x16

– 84-ball FBGA (9mm x 12.5mm) Rev. C

• FBGA package (Pb-free) – x4, x8

– 60-ball FBGA (9mm x 11.5mm) Rev. C

• FBGA package (Lead solder) – x16

– 84-ball FBGA (9mm x 12.5mm) Rev. C

• Timing – cycle time

– 1.875ns @ CL = 7 (DDR2-1066)

– 2.5ns @ CL = 5 (DDR2-800)

– 2.5ns @ CL = 6 (DDR2-800)

– 3.0ns @ CL = 5 (DDR2-667)

• Self refresh

– Standard

• Operating temperature

– Commercial (0°C

≤

+85°C)

– Industrial (–40°C

≤

+95°C;

–40°C

≤

+85°C)

• Revision

Note:

Marking

512M4

256M8

128M16

-187E

-25E

-25

-3

None

:A/:C

1. Not all options listed can be combined to

define an offered product. Use the Part

Catalog Search on

www.micron.com

for

product offerings and availability.

PDF: 09005aef824f87b6

2Gb_DDR2.pdf – Rev. H 10/11 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

2Gb: x4, x8, x16 DDR2 SDRAM

Features

Table 1: Key Timing Parameters

Data Rate (MHz)

Speed Grade

-187E

-25E

-25

-3

CL = 3

400

CL = 4

533

CL = 5

800

667

CL = 6

800

n/a

CL = 7

1066

n/a

(ns)

Table 2: Addressing

Parameter

Configuration

Refresh count

Row address

Bank address

Column address

512 Meg x 4

64 Meg x 4 x 8 banks

A[14:0] (32K)

BA[2:0] (8)

A[11, 9:0] (2K)

256 Meg x 8

32 Meg x 8 x 8 banks

A[14:0] (32K)

BA[2:0] (8)

A[9:0] (1K)

128 Meg x 16

16 Meg x 16 x 8 banks

A[13:0] (16K)

BA[2:0] (8)

A[9:0] (1K)

Part Numbers

Figure 1: 2Gb DDR2 Part Numbers

Example Part Number:

MT47H256M8EB-25 :C

MT47H

Configuration

Package

Speed

Revision

{

Configuration

512 Meg x 4

256 Meg x 8

128 Meg x 16

Package

84-Ball 11.5mm x 14mm FBGA

60-Ball 11.5mm x 14mm FBGA

84-Ball 9.0mm x 12.5mm FBGA

60-Ball 9.0mm x 11.5mm FBGA

84-Ball 9.0mm x 12.5mm FBGA (lead solder)

-187E

-25E

-25

-3

Speed Grade

tCK = 1.875ns, CL = 7

tCK = 2.5ns, CL = 5

tCK = 2.5ns, CL = 6

tCK = 3ns, CL = 5

512M4

256M8

128M16

Power

Standard

Blank

Industrial Temperature

:A/:C

Revision

Note:

1. Not all speeds and configurations are available.

FBGA Part Number System

Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the

part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site:

http://www.micron.com.

PDF: 09005aef824f87b6

2Gb_DDR2.pdf – Rev. H 10/11 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

2Gb: x4, x8, x16 DDR2 SDRAM

Features

Contents

State Diagram .................................................................................................................................................. 8

Functional Description ..................................................................................................................................... 9

Industrial Temperature ................................................................................................................................. 9

General Notes ............................................................................................................................................ 10

Functional Block Diagrams ............................................................................................................................. 11

Ball Assignments and Descriptions ................................................................................................................. 14

Packaging ...................................................................................................................................................... 18

Package Dimensions ................................................................................................................................... 18

FBGA Package Capacitance ......................................................................................................................... 22

Electrical Specifications – Absolute Ratings ..................................................................................................... 23

Temperature and Thermal Impedance ........................................................................................................ 23

Electrical Specifications – I

Parameters ........................................................................................................ 26

Specifications and Conditions ............................................................................................................... 26

DD7

Conditions .......................................................................................................................................... 26

AC Timing Operating Specifications ................................................................................................................ 32

AC and DC Operating Conditions .................................................................................................................... 44

ODT DC Electrical Characteristics ................................................................................................................... 44

Input Electrical Characteristics and Operating Conditions ............................................................................... 45

Output Electrical Characteristics and Operating Conditions ............................................................................. 48

Output Driver Characteristics ......................................................................................................................... 50

Power and Ground Clamp Characteristics ....................................................................................................... 54

AC Overshoot/Undershoot Specification ......................................................................................................... 55

Input Slew Rate Derating ................................................................................................................................ 57

Commands .................................................................................................................................................... 70

Truth Tables ............................................................................................................................................... 70

DESELECT ................................................................................................................................................. 74

NO OPERATION (NOP) ............................................................................................................................... 75

LOAD MODE (LM) ...................................................................................................................................... 75

ACTIVATE .................................................................................................................................................. 75

READ ......................................................................................................................................................... 75

WRITE ....................................................................................................................................................... 75

PRECHARGE .............................................................................................................................................. 76

REFRESH ................................................................................................................................................... 76

SELF REFRESH ........................................................................................................................................... 76

Mode Register (MR) ........................................................................................................................................ 76

Burst Length .............................................................................................................................................. 77

Burst Type .................................................................................................................................................. 78

Operating Mode ......................................................................................................................................... 78

DLL RESET ................................................................................................................................................. 78

Write Recovery ........................................................................................................................................... 79

Power-Down Mode ..................................................................................................................................... 79

CAS Latency (CL) ........................................................................................................................................ 80

Extended Mode Register (EMR) ....................................................................................................................... 81

DLL Enable/Disable ................................................................................................................................... 82

Output Drive Strength ................................................................................................................................ 82

DQS# Enable/Disable ................................................................................................................................. 82

RDQS Enable/Disable ................................................................................................................................. 82

Output Enable/Disable ............................................................................................................................... 82

On-Die Termination (ODT) ......................................................................................................................... 83

Off-Chip Driver (OCD) Impedance Calibration ............................................................................................ 83

PDF: 09005aef824f87b6

2Gb_DDR2.pdf – Rev. H 10/11 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

2Gb: x4, x8, x16 DDR2 SDRAM

Features

Posted CAS Additive Latency (AL) ................................................................................................................ 83

Extended Mode Register 2 (EMR2) ................................................................................................................... 85

Extended Mode Register 3 (EMR3) ................................................................................................................... 86

Initialization .................................................................................................................................................. 87

ACTIVATE ...................................................................................................................................................... 90

READ ............................................................................................................................................................. 92

READ with Precharge .................................................................................................................................. 96

READ with Auto Precharge .......................................................................................................................... 98

WRITE .......................................................................................................................................................... 103

PRECHARGE ................................................................................................................................................. 113

REFRESH ...................................................................................................................................................... 114

SELF REFRESH .............................................................................................................................................. 115

Power-Down Mode ........................................................................................................................................ 117

Precharge Power-Down Clock Frequency Change ........................................................................................... 124

Reset ............................................................................................................................................................. 125

CKE Low Anytime ...................................................................................................................................... 125

ODT Timing .................................................................................................................................................. 127

MRS Command to ODT Update Delay ........................................................................................................ 129

PDF: 09005aef824f87b6

2Gb_DDR2.pdf – Rev. H 10/11 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

2Gb: x4, x8, x16 DDR2 SDRAM

Features

List of Tables

Table 1: Key Timing Parameters ....................................................................................................................... 2

Table 2: Addressing ......................................................................................................................................... 2

Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions .......................................................................... 16

Table 4: Input Capacitance ............................................................................................................................ 22

Table 5: Absolute Maximum DC Ratings ......................................................................................................... 23

Table 6: Temperature Limits .......................................................................................................................... 24

Table 7: Thermal Impedance ......................................................................................................................... 25

Table 8: General I

Parameters ..................................................................................................................... 26

Table 9: I

DD7

Timing Patterns (8-Bank Interleave READ Operation) ................................................................. 27

Table 10: DDR2 I

Specifications and Conditions (Die Revision A) ................................................................. 28

Table 11: DDR2 I

Specifications and Conditions (Die Revision C) ................................................................ 30

Table 12: AC Operating Specifications and Conditions .................................................................................... 32

Table 13: Recommended DC Operating Conditions (SSTL_18) ........................................................................ 44

Table 14: ODT DC Electrical Characteristics ................................................................................................... 44

Table 15: Input DC Logic Levels ..................................................................................................................... 45

Table 16: Input AC Logic Levels ...................................................................................................................... 45

Table 17: Differential Input Logic Levels ......................................................................................................... 46

Table 18: Differential AC Output Parameters ................................................................................................... 48

Table 19: Output DC Current Drive ................................................................................................................ 48

Table 20: Output Characteristics .................................................................................................................... 49

Table 21: Full Strength Pull-Down Current (mA) ............................................................................................. 50

Table 22: Full Strength Pull-Up Current (mA) .................................................................................................. 51

Table 23: Reduced Strength Pull-Down Current (mA) ...................................................................................... 52

Table 24: Reduced Strength Pull-Up Current (mA) .......................................................................................... 53

Table 25: Input Clamp Characteristics ............................................................................................................ 54

Table 26: Address and Control Balls ................................................................................................................ 55

Table 27: Clock, Data, Strobe, and Mask Balls ................................................................................................. 55

Table 28: AC Input Test Conditions ................................................................................................................ 55

Table 29: DDR2-400/533 Setup and Hold Time Derating Values (

IS and

IH) .................................................... 58

Table 30: DDR2-667/800/1066 Setup and Hold Time Derating Values (

IS and

IH) ........................................... 59

Table 31: DDR2-400/533

DS,

DH Derating Values with Differential Strobe ...................................................... 62

Table 32: DDR2-667/800/1066

DS,

DH Derating Values with Differential Strobe ............................................. 63

Table 33: Single-Ended DQS Slew Rate Derating Values Using

and

................................................... 64

Table 34: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V

REF

) at DDR2-667 ...................................... 64

Table 35: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V

REF

) at DDR2-533 ...................................... 65

Table 36: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V

REF

) at DDR2-400 ...................................... 65

Table 37: Truth Table – DDR2 Commands ...................................................................................................... 70

Table 38: Truth Table – Current State Bank

– Command to Bank

................................................................ 71

Table 39: Truth Table – Current State Bank

– Command to Bank

............................................................... 73

Table 40: Minimum Delay with Auto Precharge Enabled ................................................................................. 74

Table 41: Burst Definition .............................................................................................................................. 78

Table 42: READ Using Concurrent Auto Precharge .......................................................................................... 98

Table 43: WRITE Using Concurrent Auto Precharge ....................................................................................... 104

Table 44: Truth Table – CKE .......................................................................................................................... 119

PDF: 09005aef824f87b6

2Gb_DDR2.pdf – Rev. H 10/11 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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