PI7C8154ANA-33E datasheet, PDF

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PI7C8154ANA-33E: DescriptionPCI Bus Controller, CMOS, PBGA304, PLASTIC, BGA-304; CategoryThe embedded processor and controller Microcontrollers and processors; File Size831KB，112 Pages; ManufacturerPericom Semiconductor Corporation (Diodes Incorporated); Websitehttps://www.diodes.com/; Environmental Compliance

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PI7C8154ANA-33E Overview

PCI Bus Controller, CMOS, PBGA304, PLASTIC, BGA-304

PI7C8154ANA-33E Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code	BGA
package instruction	BGA,
Contacts	304
Reach Compliance Code	compliant
ECCN code	EAR99
Address bus width	32
maximum clock frequency	33 MHz
External data bus width	32
JESD-30 code	S-PBGA-B304
JESD-609 code	e1
length	31 mm
Humidity sensitivity level	3
Number of terminals	304
Maximum operating temperature	85 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	2.53 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	31 mm
uPs/uCs/peripheral integrated circuit type	BUS CONTROLLER, PCI

PI7C8154ANA-33E Preview

PI7C8154A

2-Port PCI-to-PCI Bridge

REVISION 1.00

3545 North 1

Street, San Jose, CA 95134

Telephone: 1-877-PERICOM, (1-877-737-4266)

Fax: 408-435-1100

Email:

solutions@pericom.com

Internet:

http://www.pericom.com

PI7C8154A

ASYNCHRONOUS 2-PORT

PCI-to-PCI BRIDGE

Advance Information

LIFE SUPPORT POLICY

Pericom Semiconductor Corporation’s products are not authorized for use as critical components in life support devices or systems unless a

specific written agreement pertaining to such intended use is executed between the manufacturer and an officer of PSC.

Life support devices or system are devices or systems which:

a) Are intended for surgical implant into the body or

b) Support or sustain life and whose failure to perform, when properly used in accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a significant injury to the user.

A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause

the failure of the life support device or system, or to affect its safety or effectiveness. Pericom Semiconductor Corporation reserves the

right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to

supply the best possible product. Pericom Semiconductor does not assume any responsibility for use of any circuitry described other

than the circuitry embodied in a Pericom Semiconductor product. The Company makes no representations that circuitry described

herein is free from patent infringement or other rights of third parties which may result from its use. No license is granted by

implication or otherwise under any patent, patent rights or other rights, of Pericom Semiconductor Corporation.

All other trademarks are of their respective companies.

Page 2 of 112

JULY 2004 REVISION 1.00

PI7C8154A

ASYNCHRONOUS 2-PORT

PCI-to-PCI BRIDGE

Advance Information

REVISION HISTORY

Date

07/10/04

07/26/04

Revision Number

0.03

1.00

Description

Initial release of preliminary specification

Initial release of specification to the web

Updated Power Dissipation in section 17.9

Updated T

DELAY

in sections 17.4 and 17.5

Revised V

parameter in section 17.2

Page 3 of 112

JULY 2004 REVISION 1.00

PI7C8154A

ASYNCHRONOUS 2-PORT

PCI-to-PCI BRIDGE

Advance Information

This page intentionally left blank.

Page 4 of 112

JULY 2004 REVISION 1.00

PI7C8154A

ASYNCHRONOUS 2-PORT

PCI-to-PCI BRIDGE

Advance Information

TABLE OF CONTENTS

LIST OF TABLES...............................................................................................................................................10

LIST OF FIGURES.............................................................................................................................................10

INTRODUCTION ...............................................................................................................................................11

SIGNAL DEFINITIONS ...........................................................................................................................12

1.1

SIGNAL TYPES.................................................................................................................................12

1.2

SIGNALS ...........................................................................................................................................12

1.2.1

PRIMARY BUS INTERFACE SIGNALS ........................................................................................12

1.2.2

PRIMARY BUS INTERFACE SIGNALS – 64-BIT EXTENSION ...................................................14

1.2.3

SECONDARY BUS INTERFACE SIGNALS ..................................................................................15

1.2.4

SECONDARY BUS INTERFACE SIGNALS – 64-EXTENSTION..................................................17

1.2.5

CLOCK SIGNALS..........................................................................................................................17

1.2.6

MISCELLANEOUS SIGNALS........................................................................................................18

1.2.7

GENERAL PURPOSE I/O INTERFACE SIGNALS.......................................................................19

1.2.8

JTAG BOUNDARY SCAN SIGNALS .............................................................................................19

1.2.9

POWER AND GROUND ...............................................................................................................19

1.3

PIN LIST ............................................................................................................................................19

SIGNAL DEFINITIONS ...........................................................................................................................22

2.1

2.2

2.3

2.4

2.5

2.6

2.6.1

2.6.2

2.6.3

2.6.4

2.6.5

2.6.6

2.7

2.7.1

2.7.2

2.7.3

2.7.4

2.7.5

2.7.6

2.7.7

2.8

2.8.1

2.8.2

2.8.3

2.8.4

2.9

2.9.1

2.9.2

2.9.3

2.9.4

2.9.5

TYPES OF TRANSACTIONS ...........................................................................................................23

SINGLE ADDRESS PHASE..............................................................................................................23

DUAL ADDRESS PHASE.................................................................................................................24

DEVICE SELECT (DEVSEL#) GENERATION ...............................................................................24

DATA PHASE....................................................................................................................................24

WRITE TRANSACTIONS ................................................................................................................24

MEMORY WRITE TRANSACTIONS .............................................................................................25

MEMORY WRITE AND INVALIDATE..........................................................................................25

DELAYED WRITE TRANSACTIONS ............................................................................................26

WRITE TRANSACTION ADDRESS BOUNDARIES......................................................................27

BUFFERING MULTIPLE WRITE TRANSACTIONS ....................................................................27

FAST BACK-TO-BACK TRANSACTIONS ....................................................................................27

READ TRANSACTIONS ..................................................................................................................27

PREFETCHABLE READ TRANSACTIONS ..................................................................................28

NON-PREFETCHABLE READ TRANSACTIONS.........................................................................28

READ PREFETCH ADDRESS BOUNDARIES .............................................................................28

DELAYED READ REQUESTS.......................................................................................................29

DELAYED READ COMPLETION ON TARGET BUS ..................................................................29

DELAYED READ COMPLETION ON INITIATOR BUS ..............................................................30

FAST BACK-TO-BACK TRANSACTIONS ....................................................................................31

CONFIGURATION TRANSACTIONS ............................................................................................31

TYPE 0 ACCESS TO PI7C8154A ..................................................................................................31

TYPE 1 TO TYPE 0 CONFIGURATION .......................................................................................32

TYPE 1 TO TYPE 1 FORWARDING .............................................................................................33

SPECIAL CYCLES.........................................................................................................................34

64-BIT OPERATION .........................................................................................................................34

64-BIT AND 32-BIT TRANSACTIONS INITIATED BY PI7C8154A .............................................35

64-BIT TRANSACTIONS – ADDRESS PHASE .............................................................................35

64-BIT TRANSACTIONS – DATA PHASE ....................................................................................35

64-BIT TRANSACTIONS – RECEIVED BY PI7C8154A ...............................................................36

64-BIT TRANSACTIONS – SUPPORT DURING RESET..............................................................36

Page 5 of 112

JULY 2004 REVISION 1.00

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PI7C8154ANA-33E Related Products

	PI7C8154ANA-33E	PI7C8154ANAE-33	PI7C8154ANA-33
Description	PCI Bus Controller, CMOS, PBGA304, PLASTIC, BGA-304	PCI Bus Controller, CMOS, PBGA304, LEAD FREE, PLASTIC, BGA-304	PCI Bus Controller, CMOS, PBGA304, PLASTIC, BGA-304
Is it Rohs certified?	conform to	conform to	incompatible
Maker	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code	BGA	BGA	BGA
package instruction	BGA,	BGA, BGA304,23X23,50	BGA, BGA304,23X23,50
Contacts	304	304	304
Reach Compliance Code	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99
Address bus width	32	32	32
maximum clock frequency	33 MHz	33 MHz	33 MHz
External data bus width	32	32	32
JESD-30 code	S-PBGA-B304	S-PBGA-B304	S-PBGA-B304
length	31 mm	31 mm	31 mm
Number of terminals	304	304	304
Maximum operating temperature	85 °C	85 °C	85 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	BGA	BGA
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.53 mm	2.53 mm	2.53 mm
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER
Terminal form	BALL	BALL	BALL
Terminal pitch	1.27 mm	1.27 mm	1.27 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	40	NOT SPECIFIED	NOT SPECIFIED
width	31 mm	31 mm	31 mm
uPs/uCs/peripheral integrated circuit type	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI
Encapsulate equivalent code	-	BGA304,23X23,50	BGA304,23X23,50
power supply	-	3.3 V	3.3 V

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